利用MBFA-10T提高进位跳加器的效率

2017 International Conference on Nextgen Electronic Technologies: Silicon to Software (ICNETS2) Pub Date : 2017-03-23 DOI:10.1109/ICNETS2.2017.8067903

K. Kumaran, G. A. Bhanumithra, R. Rathi, M. M. Priya

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引用次数: 0

摘要

本文的目的是通过使用基于MUX的全加法器(MBFA-10T)来减少进位跳加法器(CSA)的传播时间并使其面积最小化。用基于MUX的全加法器电路代替全加法器电路，提高了CSA的效率。与现有的电路相比，该方法的延迟、所需晶体管数量和面积都有所减少。利用SPICE工具进行了设计、仿真和时序分析，得到了设计结果。结果表明，MBFA所用晶体管数量仅为10个，比CMOS全加法器(FA)少。

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Enhancing the efficiency of carry skip adder using MBFA-10T

The objective of this paper is to reduce the propagation time of carry skip adder(CSA) and also minimize the area by using MUX based full adder (MBFA-10T). The efficiency of the CSA has been improved by replacing the full adders with MUX based full adder circuit. Using this approach the delay, number of required transistors and the area has been diminished while comparing it to the existing one. The results are obtained after design, simulation and timing analysis was done using SPICE tool. From the results it shows that the transistors used in MBFA is only ten, which is less than that of the CMOS Full Adder (FA).

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2017 International Conference on Nextgen Electronic Technologies: Silicon to Software (ICNETS2)

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