{"title":"采用嵌入式设计技术,设计了基于FPGA的VGA系统来显示合成电路的元件","authors":"M. R. Khalil, S. Ali","doi":"10.1109/ICECCPCE.2013.6998747","DOIUrl":null,"url":null,"abstract":"Synthesis techniques of passive or active circuits require a media to display the inferred form of the realized filters and their components. The work forwards anew methodology to draw the form of the synthesized filter on screen connected to a soft-core processor system. VGA controller IP core is added to a processor system using embedded design techniques. The processor system is programmed to analyze the transfer function of the filters, infer its form with components and draw the resultant circuit on the screen. Spartan 3E FPGA slice is used in the work.","PeriodicalId":226378,"journal":{"name":"2013 International Conference on Electrical Communication, Computer, Power, and Control Engineering (ICECCPCE)","volume":"59 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2013-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"Designing FPGA based VGA system to display the component of synthesized electrical circuits using embedded design techniqus\",\"authors\":\"M. R. Khalil, S. Ali\",\"doi\":\"10.1109/ICECCPCE.2013.6998747\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Synthesis techniques of passive or active circuits require a media to display the inferred form of the realized filters and their components. The work forwards anew methodology to draw the form of the synthesized filter on screen connected to a soft-core processor system. VGA controller IP core is added to a processor system using embedded design techniques. The processor system is programmed to analyze the transfer function of the filters, infer its form with components and draw the resultant circuit on the screen. Spartan 3E FPGA slice is used in the work.\",\"PeriodicalId\":226378,\"journal\":{\"name\":\"2013 International Conference on Electrical Communication, Computer, Power, and Control Engineering (ICECCPCE)\",\"volume\":\"59 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2013-12-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2013 International Conference on Electrical Communication, Computer, Power, and Control Engineering (ICECCPCE)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICECCPCE.2013.6998747\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2013 International Conference on Electrical Communication, Computer, Power, and Control Engineering (ICECCPCE)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICECCPCE.2013.6998747","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
摘要
无源或有源电路的合成技术需要一种介质来显示所实现的滤波器及其元件的推断形式。该工作提出了一种新的方法来绘制连接到软核处理器系统的屏幕上的合成滤波器的形式。VGA控制器IP核使用嵌入式设计技术添加到处理器系统中。对处理器系统进行编程,分析滤波器的传递函数,用元件推导传递函数的形式,并在屏幕上绘制结果电路。工作中采用Spartan 3E FPGA片。
Designing FPGA based VGA system to display the component of synthesized electrical circuits using embedded design techniqus
Synthesis techniques of passive or active circuits require a media to display the inferred form of the realized filters and their components. The work forwards anew methodology to draw the form of the synthesized filter on screen connected to a soft-core processor system. VGA controller IP core is added to a processor system using embedded design techniques. The processor system is programmed to analyze the transfer function of the filters, infer its form with components and draw the resultant circuit on the screen. Spartan 3E FPGA slice is used in the work.