{"title":"对比分析了不同电源馈电拓扑下矩阵芯片的噪声电压分布","authors":"I. Vasiltsov","doi":"10.1109/TELSKS.2001.955890","DOIUrl":null,"url":null,"abstract":"In this paper the noise voltage distributions of the matrix chip with coplanar and orthogonal topology of power supply feeding have been investigated. Obtained results can be used to predict the most critical area of the matrix chip from the viewpoint of internal noises influence, to choose the optimal topology of the chip for digital device implementation, as well as for other reasons.","PeriodicalId":253344,"journal":{"name":"5th International Conference on Telecommunications in Modern Satellite, Cable and Broadcasting Service. TELSIKS 2001. Proceedings of Papers (Cat. No.01EX517)","volume":"229 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2001-09-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Comparative analysis of the noise voltage distribution of the matrix chip with different topology of power supply feeding\",\"authors\":\"I. Vasiltsov\",\"doi\":\"10.1109/TELSKS.2001.955890\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper the noise voltage distributions of the matrix chip with coplanar and orthogonal topology of power supply feeding have been investigated. Obtained results can be used to predict the most critical area of the matrix chip from the viewpoint of internal noises influence, to choose the optimal topology of the chip for digital device implementation, as well as for other reasons.\",\"PeriodicalId\":253344,\"journal\":{\"name\":\"5th International Conference on Telecommunications in Modern Satellite, Cable and Broadcasting Service. TELSIKS 2001. Proceedings of Papers (Cat. No.01EX517)\",\"volume\":\"229 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2001-09-19\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"5th International Conference on Telecommunications in Modern Satellite, Cable and Broadcasting Service. TELSIKS 2001. Proceedings of Papers (Cat. No.01EX517)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/TELSKS.2001.955890\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"5th International Conference on Telecommunications in Modern Satellite, Cable and Broadcasting Service. TELSIKS 2001. Proceedings of Papers (Cat. No.01EX517)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/TELSKS.2001.955890","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Comparative analysis of the noise voltage distribution of the matrix chip with different topology of power supply feeding
In this paper the noise voltage distributions of the matrix chip with coplanar and orthogonal topology of power supply feeding have been investigated. Obtained results can be used to predict the most critical area of the matrix chip from the viewpoint of internal noises influence, to choose the optimal topology of the chip for digital device implementation, as well as for other reasons.