{"title":"跨越行为和结构领域边界的高水平测试综合","authors":"Kowen Lai, C. Papachristou, M. Baklashov","doi":"10.1109/ICCD.1997.628932","DOIUrl":null,"url":null,"abstract":"High level test synthesis (HLTS), a term introduced in recent years, promises automatic enhancement of testability of a circuit. The authors show how HLTS can achieve higher testability for BIST oriented test methodologies. Their results show considering testability during high-level synthesis, better testability can be obtained when compared to DFT at low level. Transformation for testability, which allows behavioral modification for testability, is a very powerful HLTS technique.","PeriodicalId":154864,"journal":{"name":"Proceedings International Conference on Computer Design VLSI in Computers and Processors","volume":"1036 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1997-10-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":"{\"title\":\"High level test synthesis across the boundary of behavioral and structural domains\",\"authors\":\"Kowen Lai, C. Papachristou, M. Baklashov\",\"doi\":\"10.1109/ICCD.1997.628932\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"High level test synthesis (HLTS), a term introduced in recent years, promises automatic enhancement of testability of a circuit. The authors show how HLTS can achieve higher testability for BIST oriented test methodologies. Their results show considering testability during high-level synthesis, better testability can be obtained when compared to DFT at low level. Transformation for testability, which allows behavioral modification for testability, is a very powerful HLTS technique.\",\"PeriodicalId\":154864,\"journal\":{\"name\":\"Proceedings International Conference on Computer Design VLSI in Computers and Processors\",\"volume\":\"1036 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1997-10-12\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"6\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings International Conference on Computer Design VLSI in Computers and Processors\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICCD.1997.628932\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings International Conference on Computer Design VLSI in Computers and Processors","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICCD.1997.628932","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 6
摘要
高水平测试合成(High level test synthesis, HLTS)是近年来出现的一个术语,它有望自动提高电路的可测试性。作者展示了HLTS如何为面向BIST的测试方法实现更高的可测试性。结果表明,考虑高阶合成时的可测性,与低阶合成时的DFT相比,可获得更好的可测性。可测试性转换允许对可测试性进行行为修改,这是一种非常强大的HLTS技术。
High level test synthesis across the boundary of behavioral and structural domains
High level test synthesis (HLTS), a term introduced in recent years, promises automatic enhancement of testability of a circuit. The authors show how HLTS can achieve higher testability for BIST oriented test methodologies. Their results show considering testability during high-level synthesis, better testability can be obtained when compared to DFT at low level. Transformation for testability, which allows behavioral modification for testability, is a very powerful HLTS technique.