Chien-Chung Ho, Po-Chun Huang, Yuan-Hao Chang, Tei-Wei Kuo
{"title":"本机闪存文件系统的ram -flash索引","authors":"Chien-Chung Ho, Po-Chun Huang, Yuan-Hao Chang, Tei-Wei Kuo","doi":"10.1109/CODES-ISSS.2013.6658990","DOIUrl":null,"url":null,"abstract":"Index structures are widely used in file systems and database applications for efficient data management. This paper exploits the respective characteristics of DRAM and flash memory for tree index designs, for which a native file system is taken as an example target in the research. Different from DRAM caching or buffering of flash-memory access in the past work, a hybrid index design that resides over DRAM and flash memory simulaneously is proposed to improve system performance and space management. Tree nodes migrate between DRAM and flash memory, as needed, in response to user access pattern so as to optimize the performance and to reduce managing overhead. The capability of the proposed design is evaluated by a series of experiments, for which we have very encouraging results.","PeriodicalId":163484,"journal":{"name":"2013 International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS)","volume":"515 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2013-09-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"A DRAM-flash index for native flash file systems\",\"authors\":\"Chien-Chung Ho, Po-Chun Huang, Yuan-Hao Chang, Tei-Wei Kuo\",\"doi\":\"10.1109/CODES-ISSS.2013.6658990\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Index structures are widely used in file systems and database applications for efficient data management. This paper exploits the respective characteristics of DRAM and flash memory for tree index designs, for which a native file system is taken as an example target in the research. Different from DRAM caching or buffering of flash-memory access in the past work, a hybrid index design that resides over DRAM and flash memory simulaneously is proposed to improve system performance and space management. Tree nodes migrate between DRAM and flash memory, as needed, in response to user access pattern so as to optimize the performance and to reduce managing overhead. The capability of the proposed design is evaluated by a series of experiments, for which we have very encouraging results.\",\"PeriodicalId\":163484,\"journal\":{\"name\":\"2013 International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS)\",\"volume\":\"515 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2013-09-29\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2013 International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/CODES-ISSS.2013.6658990\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2013 International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CODES-ISSS.2013.6658990","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Index structures are widely used in file systems and database applications for efficient data management. This paper exploits the respective characteristics of DRAM and flash memory for tree index designs, for which a native file system is taken as an example target in the research. Different from DRAM caching or buffering of flash-memory access in the past work, a hybrid index design that resides over DRAM and flash memory simulaneously is proposed to improve system performance and space management. Tree nodes migrate between DRAM and flash memory, as needed, in response to user access pattern so as to optimize the performance and to reduce managing overhead. The capability of the proposed design is evaluated by a series of experiments, for which we have very encouraging results.