具有7.98 ENOB的8位1MHz连续逼近寄存器(SAR) A/D

2011 IEEE International Conference on Anti-Counterfeiting, Security and Identification Pub Date : 2011-06-24 DOI:10.1109/ASID.2011.5967435

Y. Ye, Liyuan Liu, Fule Li, Dongmei Li, Zhihua Wang

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引用次数: 3

摘要

研制了一种8位1MHz逐次逼近寄存器(SAR) A/D。它采用两个采样自启动开关，一个电荷再分配DAC，一个动态比较器和一个数字控制块。该ADC采用0.5µm CMOS工艺制造，有源核心面积为0.5*1.0 mm2。测量结果表明，A/D的峰值SNDR为49.8dB, SFDR为68.7dB。ENOB的有效位数为7.98。当输入信号频率高达5.477MHz时，A/D也可以达到7enob以上。总功耗为2.5 mw。

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An 8-bit 1MHz Successive Approximation Register (SAR) A/D with 7.98 ENOB

An 8-bit 1MHz Successive Approximation Register (SAR) A/D has been developed. It employs two sampling bootstrapped switches, a charge redistribution DAC, a dynamic comparator and a digital control block. The presented ADC is fabricated in a 0.5µm CMOS process and the active core area is 0.5*1.0 mm2. Measurement results show the A/D achieves 49.8dB peak SNDR and 68.7dB SFDR. The effect number of bits (ENOB) is 7.98. When the frequency of input signal is up to 5.477MHz, the A/D can also achieve more than 7 ENOB. The total power dissipates is 2.5-mW.

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2011 IEEE International Conference on Anti-Counterfeiting, Security and Identification

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