A software approach to multiprocessor address trace generation

The authors describe a technique for generating architecture-independent multiprocessor data address traces on a widely available RISC (reduced instruction set computer) uniprocessor for a specific class of parallel applications. Automatic modification of the application assembly language enables run-time recording of the virtual address and data for loads and stores. Barrier synchronization events are captured in the traces. The tracing technique (called the Tracer) is relatively fast, portable, and does not require access to a multiprocessor. The generality of the traces and the slow-down by a factor of 10 when generating traces compares favourably with other address tracing methods. The Tracer has proved useful in the evaluation of a hierarchical shared bus multiprocessor. The Tracer can be used to gather statistics on programs for use in stochastic models such as queuing networks. Additionally, the visualization of memory access patterns that can be made with the traces is a useful tool in studying parallel applications on shared memory multiprocessors.<>