Abdelhafid Cherifi, A. Chouder, A. Kessal, Abdelhaj Hadjkkadour, A. Aillane, Khalil Louassaa
{"title":"用虚拟同步发电机控制单机逆变器","authors":"Abdelhafid Cherifi, A. Chouder, A. Kessal, Abdelhaj Hadjkkadour, A. Aillane, Khalil Louassaa","doi":"10.1109/ICATEEE57445.2022.10093091","DOIUrl":null,"url":null,"abstract":"This paper studies a control of an inverter to emulate a synchronous generator (SG), which has many benefits in terms of stability. These benefits can be used in the virtual synchronous generator (VSG) and are proven experimentally in the stand-alone mode. Theoretical analysis and designs of the VSG are presented and verified by simulation in Psim. The paper is completed with simulations results. Furthermore, a processor in the loop (PIL) test is implemented as an experimental test of the proposed method. It consists of implementing the generated code on the F28335 DSP board. The obtained results from the DSP board are similar to analogical simulation results.","PeriodicalId":150519,"journal":{"name":"2022 International Conference of Advanced Technology in Electronic and Electrical Engineering (ICATEEE)","volume":"140 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-11-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Control of Stand-Alone Inverter using Virtual Synchronous Generator\",\"authors\":\"Abdelhafid Cherifi, A. Chouder, A. Kessal, Abdelhaj Hadjkkadour, A. Aillane, Khalil Louassaa\",\"doi\":\"10.1109/ICATEEE57445.2022.10093091\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper studies a control of an inverter to emulate a synchronous generator (SG), which has many benefits in terms of stability. These benefits can be used in the virtual synchronous generator (VSG) and are proven experimentally in the stand-alone mode. Theoretical analysis and designs of the VSG are presented and verified by simulation in Psim. The paper is completed with simulations results. Furthermore, a processor in the loop (PIL) test is implemented as an experimental test of the proposed method. It consists of implementing the generated code on the F28335 DSP board. The obtained results from the DSP board are similar to analogical simulation results.\",\"PeriodicalId\":150519,\"journal\":{\"name\":\"2022 International Conference of Advanced Technology in Electronic and Electrical Engineering (ICATEEE)\",\"volume\":\"140 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2022-11-26\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2022 International Conference of Advanced Technology in Electronic and Electrical Engineering (ICATEEE)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICATEEE57445.2022.10093091\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 International Conference of Advanced Technology in Electronic and Electrical Engineering (ICATEEE)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICATEEE57445.2022.10093091","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Control of Stand-Alone Inverter using Virtual Synchronous Generator
This paper studies a control of an inverter to emulate a synchronous generator (SG), which has many benefits in terms of stability. These benefits can be used in the virtual synchronous generator (VSG) and are proven experimentally in the stand-alone mode. Theoretical analysis and designs of the VSG are presented and verified by simulation in Psim. The paper is completed with simulations results. Furthermore, a processor in the loop (PIL) test is implemented as an experimental test of the proposed method. It consists of implementing the generated code on the F28335 DSP board. The obtained results from the DSP board are similar to analogical simulation results.