P. Wilsey, D. Hensgen, N. Abu-Ghazaleh, C.E. Slusher, D.Y. Hollinden
{"title":"SIMD处理器上非通信程序的并发执行","authors":"P. Wilsey, D. Hensgen, N. Abu-Ghazaleh, C.E. Slusher, D.Y. Hollinden","doi":"10.1109/FMPC.1992.234908","DOIUrl":null,"url":null,"abstract":"This paper explores the use of SIMD (single-instruction multiple-data) (or SIMD-like) hardware to support the efficient interpretation of concurrent, noncommunicating programs. This approach places compiled programs into the local memory space of each distinct processing element (PE). Within each PE, a local program contour is initialized, and the instructions are interpreted in parallel across all of the PEs by control signals emanating from the central control unit. Initial experiments have been conducted with two distinct software architectures (MINTABs and MIPS R2000) on the MasPar MP-1 and two distinct applications (program mutation analysis and Monte Carlo simulation). While these experiments have shown only marginal performance improvement, it appears that, with several minor hardware modifications, SIMD-like hardware can be constructed that will cost-effectively support both SIMD and MIMD (multiple-instruction multiple-data) processing.<<ETX>>","PeriodicalId":117789,"journal":{"name":"[Proceedings 1992] The Fourth Symposium on the Frontiers of Massively Parallel Computation","volume":"524 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1992-10-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"19","resultStr":"{\"title\":\"The concurrent execution of non-communicating programs on SIMD processors\",\"authors\":\"P. Wilsey, D. Hensgen, N. Abu-Ghazaleh, C.E. Slusher, D.Y. Hollinden\",\"doi\":\"10.1109/FMPC.1992.234908\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper explores the use of SIMD (single-instruction multiple-data) (or SIMD-like) hardware to support the efficient interpretation of concurrent, noncommunicating programs. This approach places compiled programs into the local memory space of each distinct processing element (PE). Within each PE, a local program contour is initialized, and the instructions are interpreted in parallel across all of the PEs by control signals emanating from the central control unit. Initial experiments have been conducted with two distinct software architectures (MINTABs and MIPS R2000) on the MasPar MP-1 and two distinct applications (program mutation analysis and Monte Carlo simulation). While these experiments have shown only marginal performance improvement, it appears that, with several minor hardware modifications, SIMD-like hardware can be constructed that will cost-effectively support both SIMD and MIMD (multiple-instruction multiple-data) processing.<<ETX>>\",\"PeriodicalId\":117789,\"journal\":{\"name\":\"[Proceedings 1992] The Fourth Symposium on the Frontiers of Massively Parallel Computation\",\"volume\":\"524 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1992-10-19\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"19\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"[Proceedings 1992] The Fourth Symposium on the Frontiers of Massively Parallel Computation\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/FMPC.1992.234908\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"[Proceedings 1992] The Fourth Symposium on the Frontiers of Massively Parallel Computation","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/FMPC.1992.234908","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
The concurrent execution of non-communicating programs on SIMD processors
This paper explores the use of SIMD (single-instruction multiple-data) (or SIMD-like) hardware to support the efficient interpretation of concurrent, noncommunicating programs. This approach places compiled programs into the local memory space of each distinct processing element (PE). Within each PE, a local program contour is initialized, and the instructions are interpreted in parallel across all of the PEs by control signals emanating from the central control unit. Initial experiments have been conducted with two distinct software architectures (MINTABs and MIPS R2000) on the MasPar MP-1 and two distinct applications (program mutation analysis and Monte Carlo simulation). While these experiments have shown only marginal performance improvement, it appears that, with several minor hardware modifications, SIMD-like hardware can be constructed that will cost-effectively support both SIMD and MIMD (multiple-instruction multiple-data) processing.<>