可靠的全摆幅低失真CMOS自举采样开关

M. Asgari, Seyyed Hossein Pishgar Komleh, O. Hashemipour
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引用次数: 6

摘要

提出了一种可靠的低失真CMOS自举采样开关。由于电路的极限为VDD+VTHn和- |VTHp|,因此与传统自启动开关相比,该方案具有更高的可靠性。该CMOS采样开关的等效电导随输入信号的变化通过特定开关的电压控制得到缓解。与以往的方案相比,该开关的晶体管数量减少了一半,更简单,面积更小。使用标准0.18μm CMOS技术模型进行的仿真表明,在传统的全差分采样保持电路中使用该技术时,THD和SFDR都提高了约10dB。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
A reliable full-swing low-distortion CMOS bootstrapped sampling switch
A reliable low-distortion CMOS bootstrapped sampling switch is presented. Compared to conventional bootstrapped switch, this scheme achieves more reliability because the limits of proposed circuit are VDD+VTHn and −|VTHp|. The variation of equivalent conductance of this CMOS sampling switch through input signal is alleviated by a specific switch's voltage control. The proposed switch is realized with the half number of transistors compared to previously reported scheme which results more simplicity and less area. Simulations using a standard 0.18μm CMOS technology model show about 10dB improvements in both THD and SFDR while using it in a conventional fully-differential sample-and-hold circuit.
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