K. Raju, M. V. Kartikeyan, R. C. Joshi, C. Shekhar
{"title":"基于SDR的RASIP体系结构与指令集设计","authors":"K. Raju, M. V. Kartikeyan, R. C. Joshi, C. Shekhar","doi":"10.1109/ADCOM.2006.4289942","DOIUrl":null,"url":null,"abstract":"In this paper, a novel methodology has been presented for designing the architecture and its instruction-set for Reconfigurable Application Specific Instruction-set Processor (RASIP) for Software Defined Radio (SDR). We have described the architectural aspects by giving complete functionality of different modules present in the architecture. Instruction set design for the RASIP for achieving SDR functionality has been described and modeled for proposed architecture. We have introduced new concept of the user-defined instructions that are used for upgradation and modification of existing instruction set after designing the RASIP to incorporate new functionality. This flexibility is essential for any SDR to incorporate new standards in future. The complete system has been modeled in SystemC, which will allow simulation of hardware and software in a single environment. Simulated results of partial instructions of Instruction-Set and complete architecture are presented.","PeriodicalId":296627,"journal":{"name":"2006 International Conference on Advanced Computing and Communications","volume":"197 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2006-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"Design of Architecture and Instruction-set of RASIP for SDR\",\"authors\":\"K. Raju, M. V. Kartikeyan, R. C. Joshi, C. Shekhar\",\"doi\":\"10.1109/ADCOM.2006.4289942\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper, a novel methodology has been presented for designing the architecture and its instruction-set for Reconfigurable Application Specific Instruction-set Processor (RASIP) for Software Defined Radio (SDR). We have described the architectural aspects by giving complete functionality of different modules present in the architecture. Instruction set design for the RASIP for achieving SDR functionality has been described and modeled for proposed architecture. We have introduced new concept of the user-defined instructions that are used for upgradation and modification of existing instruction set after designing the RASIP to incorporate new functionality. This flexibility is essential for any SDR to incorporate new standards in future. The complete system has been modeled in SystemC, which will allow simulation of hardware and software in a single environment. Simulated results of partial instructions of Instruction-Set and complete architecture are presented.\",\"PeriodicalId\":296627,\"journal\":{\"name\":\"2006 International Conference on Advanced Computing and Communications\",\"volume\":\"197 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2006-12-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2006 International Conference on Advanced Computing and Communications\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ADCOM.2006.4289942\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2006 International Conference on Advanced Computing and Communications","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ADCOM.2006.4289942","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Design of Architecture and Instruction-set of RASIP for SDR
In this paper, a novel methodology has been presented for designing the architecture and its instruction-set for Reconfigurable Application Specific Instruction-set Processor (RASIP) for Software Defined Radio (SDR). We have described the architectural aspects by giving complete functionality of different modules present in the architecture. Instruction set design for the RASIP for achieving SDR functionality has been described and modeled for proposed architecture. We have introduced new concept of the user-defined instructions that are used for upgradation and modification of existing instruction set after designing the RASIP to incorporate new functionality. This flexibility is essential for any SDR to incorporate new standards in future. The complete system has been modeled in SystemC, which will allow simulation of hardware and software in a single environment. Simulated results of partial instructions of Instruction-Set and complete architecture are presented.
求助内容：
应助结果提醒方式：
京公网安备 11010802042870号
