分层配电网络中ESD和EMI问题的建模

2003 IEEE Symposium on Electromagnetic Compatibility. Symposium Record (Cat. No.03CH37446) Pub Date : 2003-10-14 DOI:10.1109/ISEMC.2003.1236562

Hwang-Yoon Shim, Jiseong Kim, J. Yook

{"title":"分层配电网络中ESD和EMI问题的建模","authors":"Hwang-Yoon Shim, Jiseong Kim, J. Yook","doi":"10.1109/ISEMC.2003.1236562","DOIUrl":null,"url":null,"abstract":"ESD and EMI problems and their possible solutions are addressed for the multi-layer power distribution network of high-speed digital systems. To prevent system from ESD damage, split I/O port ground with stitching element such as conductor or inductor is proposed, while stitching and decoupling capacitors are proved to be very effective for reducing electromagnetic radiation from the split power plane. Simulations based on 3D-finite difference time domain (FDTD) method are utilized for the analysis of practical high frequency multi-layered PC mainboard.","PeriodicalId":359422,"journal":{"name":"2003 IEEE Symposium on Electromagnetic Compatibility. Symposium Record (Cat. No.03CH37446)","volume":"184 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2003-10-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"12","resultStr":"{\"title\":\"Modeling of ESD and EMI problems in split multi-layer power distribution network\",\"authors\":\"Hwang-Yoon Shim, Jiseong Kim, J. Yook\",\"doi\":\"10.1109/ISEMC.2003.1236562\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"ESD and EMI problems and their possible solutions are addressed for the multi-layer power distribution network of high-speed digital systems. To prevent system from ESD damage, split I/O port ground with stitching element such as conductor or inductor is proposed, while stitching and decoupling capacitors are proved to be very effective for reducing electromagnetic radiation from the split power plane. Simulations based on 3D-finite difference time domain (FDTD) method are utilized for the analysis of practical high frequency multi-layered PC mainboard.\",\"PeriodicalId\":359422,\"journal\":{\"name\":\"2003 IEEE Symposium on Electromagnetic Compatibility. Symposium Record (Cat. No.03CH37446)\",\"volume\":\"184 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2003-10-14\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"12\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2003 IEEE Symposium on Electromagnetic Compatibility. Symposium Record (Cat. No.03CH37446)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISEMC.2003.1236562\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2003 IEEE Symposium on Electromagnetic Compatibility. Symposium Record (Cat. No.03CH37446)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISEMC.2003.1236562","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 12

摘要

针对高速数字系统的多层配电网络，提出了ESD和EMI问题及其可能的解决方案。为了防止系统受到ESD的损害，提出了采用拼接元件(如导体或电感)分割I/O端口接地，同时采用拼接和去耦电容对减少分割电源平面的电磁辐射非常有效。利用三维时域有限差分(FDTD)方法对实际的高频多层PC机主板进行了仿真分析。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

查看原文本刊更多论文

Modeling of ESD and EMI problems in split multi-layer power distribution network

ESD and EMI problems and their possible solutions are addressed for the multi-layer power distribution network of high-speed digital systems. To prevent system from ESD damage, split I/O port ground with stitching element such as conductor or inductor is proposed, while stitching and decoupling capacitors are proved to be very effective for reducing electromagnetic radiation from the split power plane. Simulations based on 3D-finite difference time domain (FDTD) method are utilized for the analysis of practical high frequency multi-layered PC mainboard.

求助全文

通过发布文献求助，成功后即可免费获取论文全文。去求助

来源期刊

2003 IEEE Symposium on Electromagnetic Compatibility. Symposium Record (Cat. No.03CH37446)

自引率

0.00%

发文量