在采用tdc的FPGA中实现200 MS/s ADC

H. Homulle, F. Regazzoni, E. Charbon
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引用次数: 18

摘要

模拟信号用于许多应用和系统,如网络物理系统,传感器网络和汽车应用。这些也是fpga使用不断增长的应用领域。然而,到目前为止,数字fpga和模拟世界之间没有直接集成(除了最新一代的fpga)。目前,必须在系统中添加外部模数转换器(ADC),从而限制了其整体紧凑性和灵活性。为了解决这个问题,我们提出了一种在可重构器件中实现高速ADC的新架构。该系统利用皮秒分辨率的时间-数字转换器(tdc)来实现与时钟速度一样快的转换。由此产生的模拟通过时间到数字转换器(ATDC)可以实现200 MS/s的采样率和7位分辨率,信号范围从0到2.5 V。除了模拟参考斜坡所需的外部电阻外,系统完全集成在目标FPGA内。此外,我们的设计可以很容易地扩展到多通道adc,证明了可重构器件适合需要在模拟和数字世界之间深度集成的应用。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
200 MS/s ADC implemented in a FPGA employing TDCs
Analog signals are used in many applications and systems, such as cyber physical systems, sensor networks and automotive applications. These are also applications where the use of FPGAs is continuously growing. To date, however there is no direct integration between FPGAs, which are digital, and the analog world (except for the newest generation of FPGAs). Currently, an external analog-to-digital converter (ADC) has to be added to the system, thus limiting its overall compactness and flexibility. To address this issue we propose a novel architecture implementing a high speed ADC in reconfigurable devices. The system exploits picosecond resolution time-to-digital converters (TDCs) to reach a conversion as fast as its clock speed. The resulting analog-through-time-to-digital converter (ATDC) can achieve a sampling rate of 200 MS/s with a 7 bit resolution for signals ranging from 0 to 2.5 V. Except for the external resistor needed for the analog reference ramp, the system is fully integrated inside the target FPGA. Moreover, our design can be easily scaled for multichannel ADCs, proving the suitability of reconfigurable devices for applications requiring a deep integration between analog and digital world.
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