基于本体偏置的泄漏功率降低对软错误率的影响

Warin Sootkaneung, K. Saluja
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引用次数: 3

摘要

随着器件的几何尺寸缩小到纳米级,泄漏电流的增加以及粒子引起的软误差正在加剧电路的可靠性问题。本文首先证明了对这两个问题的独立解决并不能得到一个好的最终解决方案。需要一种更加周到和综合的设计方法来调和这两个具有挑战性的问题。接下来,我们研究了软误差率与基于体偏的泄漏减少方法的相关性,并引入了一种新的体偏相关软误差模型。我们提出了一种基于优化和启发式驱动的方法来减少泄漏,同时满足软错误率限制。我们的方法提供了适当的体偏置配置,导致电路的接近最佳的总平均故障改善时间。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Impact of Body Bias Based Leakage Power Reduction on Soft Error Rate
As device geometries shrink to nanometers, increasing leakage current coupled with particle induced soft errors is exasperating the circuit reliability issues. In this paper, we first establish that independent solutions to these two problems can not lead to a good final solution. A more thoughtful and integrated design methodology is required to reconcile these two challenging issues. Next, we investigate the dependency of soft error rate on the body bias based leakage reduction method and introduce a novel body bias-dependent soft error model. We propose an optimization based and a heuristic driven approach to reduce leakage while satisfying the soft error rate limit. Our methods provide appropriate body bias configurations that lead to near-optimal total mean time to failure improvement of a circuit.
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