P. Aylapogu, R. V. P. Bhookya, D. Venkatachari, K. B
{"title":"基于双电流镜技术的高效50mV至1V电压电平转换器","authors":"P. Aylapogu, R. V. P. Bhookya, D. Venkatachari, K. B","doi":"10.1109/ICEARS53579.2022.9752383","DOIUrl":null,"url":null,"abstract":"In this article, an energy efficient and low delay architecture for voltage level shifter with the help of dual current mirror approach has been discussed. Voltage shifter is competent of changing the voltage level from one value to another value. The pivotal principle of the shifter is to connect the different blocks in the circuit. Moreover voltage level shifter is preferable in System on Chip. The suggested design is to transfer 50mV to 1V level at a faster rate and significantly less usage power. It was created using the Wilson current mirror technology with less number of transistors. The suggested design is realized on 45-nm Technology using cadence tool. This circuit is having propagation latency of 0.959ns and power dissipation of 106.6nW. It is assured that the obtained simulations results are better than the existed results in terms of power and delay.","PeriodicalId":252961,"journal":{"name":"2022 International Conference on Electronics and Renewable Systems (ICEARS)","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2022-03-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Dual Current Mirror Technique Based Energy Efficient 50mV to 1V Voltage Level Shifter\",\"authors\":\"P. Aylapogu, R. V. P. Bhookya, D. Venkatachari, K. B\",\"doi\":\"10.1109/ICEARS53579.2022.9752383\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this article, an energy efficient and low delay architecture for voltage level shifter with the help of dual current mirror approach has been discussed. Voltage shifter is competent of changing the voltage level from one value to another value. The pivotal principle of the shifter is to connect the different blocks in the circuit. Moreover voltage level shifter is preferable in System on Chip. The suggested design is to transfer 50mV to 1V level at a faster rate and significantly less usage power. It was created using the Wilson current mirror technology with less number of transistors. The suggested design is realized on 45-nm Technology using cadence tool. This circuit is having propagation latency of 0.959ns and power dissipation of 106.6nW. It is assured that the obtained simulations results are better than the existed results in terms of power and delay.\",\"PeriodicalId\":252961,\"journal\":{\"name\":\"2022 International Conference on Electronics and Renewable Systems (ICEARS)\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2022-03-16\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2022 International Conference on Electronics and Renewable Systems (ICEARS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICEARS53579.2022.9752383\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 International Conference on Electronics and Renewable Systems (ICEARS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICEARS53579.2022.9752383","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Dual Current Mirror Technique Based Energy Efficient 50mV to 1V Voltage Level Shifter
In this article, an energy efficient and low delay architecture for voltage level shifter with the help of dual current mirror approach has been discussed. Voltage shifter is competent of changing the voltage level from one value to another value. The pivotal principle of the shifter is to connect the different blocks in the circuit. Moreover voltage level shifter is preferable in System on Chip. The suggested design is to transfer 50mV to 1V level at a faster rate and significantly less usage power. It was created using the Wilson current mirror technology with less number of transistors. The suggested design is realized on 45-nm Technology using cadence tool. This circuit is having propagation latency of 0.959ns and power dissipation of 106.6nW. It is assured that the obtained simulations results are better than the existed results in terms of power and delay.