Md Zubair Ebne Rafique, Alam Mahmud, S. M. Mominuzzaman
{"title":"亚10nm节点高频工作CNFET运放的优化","authors":"Md Zubair Ebne Rafique, Alam Mahmud, S. M. Mominuzzaman","doi":"10.1109/ICECE.2016.7853962","DOIUrl":null,"url":null,"abstract":"This paper presents optimization of various parameters of carbon nanotube field effect transistor (CNFET) based op amp in sub-10 nm node for high frequency operation. Parameters such as, channel length, gate oxide thickness, gate dielectric constant, spacer doping, spacer dielectric constant and pitch, are optimized. For high frequency operation of op amp, optimum values of CNFET parameters are found to be 10 nm channel length, 10 dielectric constant of gate oxide, 3 nm gate oxide thickness, 5 nm pitch, zero source/drain doping concentration, 4 dielectric constant of spacer oxide. Performance of CNFET op amp incorporating these optimum values is investigated and compared with previous work. Obtained results reveals significant differences among previously designed Si CMOS op amp, 32 nm CNFET and the sub-10-nm CNFET op amp investigated here.","PeriodicalId":122930,"journal":{"name":"2016 9th International Conference on Electrical and Computer Engineering (ICECE)","volume":"38 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2016-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Optimization of CNFET op amp for high frequency operation in sub-10-nm node\",\"authors\":\"Md Zubair Ebne Rafique, Alam Mahmud, S. M. Mominuzzaman\",\"doi\":\"10.1109/ICECE.2016.7853962\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents optimization of various parameters of carbon nanotube field effect transistor (CNFET) based op amp in sub-10 nm node for high frequency operation. Parameters such as, channel length, gate oxide thickness, gate dielectric constant, spacer doping, spacer dielectric constant and pitch, are optimized. For high frequency operation of op amp, optimum values of CNFET parameters are found to be 10 nm channel length, 10 dielectric constant of gate oxide, 3 nm gate oxide thickness, 5 nm pitch, zero source/drain doping concentration, 4 dielectric constant of spacer oxide. Performance of CNFET op amp incorporating these optimum values is investigated and compared with previous work. Obtained results reveals significant differences among previously designed Si CMOS op amp, 32 nm CNFET and the sub-10-nm CNFET op amp investigated here.\",\"PeriodicalId\":122930,\"journal\":{\"name\":\"2016 9th International Conference on Electrical and Computer Engineering (ICECE)\",\"volume\":\"38 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2016-12-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2016 9th International Conference on Electrical and Computer Engineering (ICECE)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICECE.2016.7853962\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 9th International Conference on Electrical and Computer Engineering (ICECE)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICECE.2016.7853962","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Optimization of CNFET op amp for high frequency operation in sub-10-nm node
This paper presents optimization of various parameters of carbon nanotube field effect transistor (CNFET) based op amp in sub-10 nm node for high frequency operation. Parameters such as, channel length, gate oxide thickness, gate dielectric constant, spacer doping, spacer dielectric constant and pitch, are optimized. For high frequency operation of op amp, optimum values of CNFET parameters are found to be 10 nm channel length, 10 dielectric constant of gate oxide, 3 nm gate oxide thickness, 5 nm pitch, zero source/drain doping concentration, 4 dielectric constant of spacer oxide. Performance of CNFET op amp incorporating these optimum values is investigated and compared with previous work. Obtained results reveals significant differences among previously designed Si CMOS op amp, 32 nm CNFET and the sub-10-nm CNFET op amp investigated here.