基于数据流分析的数字集成电路物理设计分区级平面图方法

2017 2nd IEEE International Conference on Integrated Circuits and Microsystems (ICICM) Pub Date : 2017-11-01 DOI:10.1109/ICAM.2017.8242141

Yinan Zhang, Xiaohong Peng

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引用次数: 2

摘要

提出了一种基于数据流分析的数字集成电路物理设计分区级平面图方法。采用Cadence公司的P&R工具innovus进行平面设计，并以某X86 CPU的南桥设计为例，详细介绍了如何使用该方法指导平面设计。该方法对于先进工艺和高速集成电路设计更能有效地提高平面设计质量。

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A partition level floorplan method based on data flow analysis for physical design of digital IC

This paper presents a partition level floorplan method for physical design of digital integrated circuit, which based on data flow analysis. It uses Cadence company P&R tool innovus to make floorplan, and takes a X86 CPU's south bridge design for example to introduce how to use this method to guide floorplan in detail. This method is more effective to improve the quality of floorplan for advanced process technology and high speed IC design.

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来源期刊

2017 2nd IEEE International Conference on Integrated Circuits and Microsystems (ICICM)

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