Shao-Chang Huang, Ching-Ho Li, Li-Fan Chen, Chun-Chih Chen, K. Hsu, Gong-Kai Lin, Jian-Hsing Lee
{"title":"利用仿真工具优化电源IC布局","authors":"Shao-Chang Huang, Ching-Ho Li, Li-Fan Chen, Chun-Chih Chen, K. Hsu, Gong-Kai Lin, Jian-Hsing Lee","doi":"10.1109/ICCE-TW52618.2021.9603082","DOIUrl":null,"url":null,"abstract":"Power Integrated Circuit (IC) needs to consume huge currents so it often includes a large size device. In order to approach IC driving capabilities, 1.5 times to the simulation size can be used. In this study, 40 % reduction in IC layout can be reached after the correct simulation tool flow is adopted.","PeriodicalId":141850,"journal":{"name":"2021 IEEE International Conference on Consumer Electronics-Taiwan (ICCE-TW)","volume":"250 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2021-09-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"Optimizing Power IC Layouts by Simulation Tools\",\"authors\":\"Shao-Chang Huang, Ching-Ho Li, Li-Fan Chen, Chun-Chih Chen, K. Hsu, Gong-Kai Lin, Jian-Hsing Lee\",\"doi\":\"10.1109/ICCE-TW52618.2021.9603082\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Power Integrated Circuit (IC) needs to consume huge currents so it often includes a large size device. In order to approach IC driving capabilities, 1.5 times to the simulation size can be used. In this study, 40 % reduction in IC layout can be reached after the correct simulation tool flow is adopted.\",\"PeriodicalId\":141850,\"journal\":{\"name\":\"2021 IEEE International Conference on Consumer Electronics-Taiwan (ICCE-TW)\",\"volume\":\"250 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2021-09-15\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2021 IEEE International Conference on Consumer Electronics-Taiwan (ICCE-TW)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICCE-TW52618.2021.9603082\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2021 IEEE International Conference on Consumer Electronics-Taiwan (ICCE-TW)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICCE-TW52618.2021.9603082","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Power Integrated Circuit (IC) needs to consume huge currents so it often includes a large size device. In order to approach IC driving capabilities, 1.5 times to the simulation size can be used. In this study, 40 % reduction in IC layout can be reached after the correct simulation tool flow is adopted.
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