{"title":"应用新型无喷嘴喷涂技术在复杂几何形状的先进光敏聚酰亚胺上制备扇形PLP平面化均匀层","authors":"S. Erickson, Sanjay Malik","doi":"10.23919/IWLPC52010.2020.9375853","DOIUrl":null,"url":null,"abstract":"With growing demand for advanced computing systems and as personal handheld devices become more powerful, frontend manufacturers are required to reduce the physical footprint of and at the same time integrate more functionality into their chips. More I/O channels are packed into smaller areas than ever before in modern packages. The competing demands of increasing throughput and reducing costs makes the interconnection of these packages increasingly challenging. New methods to produce these high-density interconnections are required to meet these challenges. Chips are placed and connected both horizontally and vertically in 2.5D and 3D packaging. This created inherent topographical challenges for producing the interconnections. The industry's drive for cost reduction is building momentum toward more efficient and cost effective methods for creating the multi -layer high density interconnects. There are inherent topographical challenges associated with the growth of 2.5D and 3D packaging where chips are placed and interconnected horizontally and vertically. One critical area of interest is the formation of the passivation layer that enables connections between layers. Polyimides must be applied in a uniform layer to ensure that the inter-layer connections can properly be formed. Effectiveness of different film deposition methods is measured in terms of formation of uniform and void- free films to ensure intended mechanical and electrical integrity of the material is not compromised. Film deposition method can potentially influence not only film density but also polymer chain configuration that control key properties directly linked to the reliability of the material. While polarity of functional groups dictates moisture uptake, polymer chain configuration can control moisture permeability through the deposited film and its ability to act as corrosion barrier. We have previously reported creation of high -density vias printed in a dielectric film deposited by a revolutionary technique in the form of a novel nozzle-less ultrasonic spray technology. [1] This paper presents impact of such unique deposition method on key film properties like density and moisture permeability along with supporting reliability data under high temperature storage (HTS) and unbiased-HAST conditions. Other key performance parameters like filling and planarization over complex topography of an advanced dielectric material will be compared and analyzed for this approach against other liquid film deposition techniques.","PeriodicalId":192698,"journal":{"name":"2020 International Wafer Level Packaging Conference (IWLPC)","volume":"56 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2020-10-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Producing Planarized Uniform Layer in Advanced Photosensitive Polyimide Over Complex Geometry for Fan Out PLP Applied with a Novel Nozzle-Less Spray Coating Technology\",\"authors\":\"S. Erickson, Sanjay Malik\",\"doi\":\"10.23919/IWLPC52010.2020.9375853\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"With growing demand for advanced computing systems and as personal handheld devices become more powerful, frontend manufacturers are required to reduce the physical footprint of and at the same time integrate more functionality into their chips. More I/O channels are packed into smaller areas than ever before in modern packages. The competing demands of increasing throughput and reducing costs makes the interconnection of these packages increasingly challenging. New methods to produce these high-density interconnections are required to meet these challenges. Chips are placed and connected both horizontally and vertically in 2.5D and 3D packaging. This created inherent topographical challenges for producing the interconnections. The industry's drive for cost reduction is building momentum toward more efficient and cost effective methods for creating the multi -layer high density interconnects. There are inherent topographical challenges associated with the growth of 2.5D and 3D packaging where chips are placed and interconnected horizontally and vertically. One critical area of interest is the formation of the passivation layer that enables connections between layers. Polyimides must be applied in a uniform layer to ensure that the inter-layer connections can properly be formed. Effectiveness of different film deposition methods is measured in terms of formation of uniform and void- free films to ensure intended mechanical and electrical integrity of the material is not compromised. Film deposition method can potentially influence not only film density but also polymer chain configuration that control key properties directly linked to the reliability of the material. While polarity of functional groups dictates moisture uptake, polymer chain configuration can control moisture permeability through the deposited film and its ability to act as corrosion barrier. We have previously reported creation of high -density vias printed in a dielectric film deposited by a revolutionary technique in the form of a novel nozzle-less ultrasonic spray technology. [1] This paper presents impact of such unique deposition method on key film properties like density and moisture permeability along with supporting reliability data under high temperature storage (HTS) and unbiased-HAST conditions. Other key performance parameters like filling and planarization over complex topography of an advanced dielectric material will be compared and analyzed for this approach against other liquid film deposition techniques.\",\"PeriodicalId\":192698,\"journal\":{\"name\":\"2020 International Wafer Level Packaging Conference (IWLPC)\",\"volume\":\"56 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2020-10-13\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2020 International Wafer Level Packaging Conference (IWLPC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.23919/IWLPC52010.2020.9375853\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 International Wafer Level Packaging Conference (IWLPC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.23919/IWLPC52010.2020.9375853","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Producing Planarized Uniform Layer in Advanced Photosensitive Polyimide Over Complex Geometry for Fan Out PLP Applied with a Novel Nozzle-Less Spray Coating Technology
With growing demand for advanced computing systems and as personal handheld devices become more powerful, frontend manufacturers are required to reduce the physical footprint of and at the same time integrate more functionality into their chips. More I/O channels are packed into smaller areas than ever before in modern packages. The competing demands of increasing throughput and reducing costs makes the interconnection of these packages increasingly challenging. New methods to produce these high-density interconnections are required to meet these challenges. Chips are placed and connected both horizontally and vertically in 2.5D and 3D packaging. This created inherent topographical challenges for producing the interconnections. The industry's drive for cost reduction is building momentum toward more efficient and cost effective methods for creating the multi -layer high density interconnects. There are inherent topographical challenges associated with the growth of 2.5D and 3D packaging where chips are placed and interconnected horizontally and vertically. One critical area of interest is the formation of the passivation layer that enables connections between layers. Polyimides must be applied in a uniform layer to ensure that the inter-layer connections can properly be formed. Effectiveness of different film deposition methods is measured in terms of formation of uniform and void- free films to ensure intended mechanical and electrical integrity of the material is not compromised. Film deposition method can potentially influence not only film density but also polymer chain configuration that control key properties directly linked to the reliability of the material. While polarity of functional groups dictates moisture uptake, polymer chain configuration can control moisture permeability through the deposited film and its ability to act as corrosion barrier. We have previously reported creation of high -density vias printed in a dielectric film deposited by a revolutionary technique in the form of a novel nozzle-less ultrasonic spray technology. [1] This paper presents impact of such unique deposition method on key film properties like density and moisture permeability along with supporting reliability data under high temperature storage (HTS) and unbiased-HAST conditions. Other key performance parameters like filling and planarization over complex topography of an advanced dielectric material will be compared and analyzed for this approach against other liquid film deposition techniques.