基于BiCMOS的低温系数带隙参考元件的设计与实现

Deepa Talewad, A. Nandi, B. M. Vaishail
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引用次数: 1

摘要

BiCMOS带隙参考(BGR)具有参考输出精度高、温度系数小等优点。为了提高VREF最终输出的稳定性,本文提出了一种带隙参考电路,采用折叠级联运放。在带隙基准工作的电压模式架构中采用微调电路,可以提高输出的温度稳定性,且功耗较低。仅使用一阶温度补偿技术,所提出的电路在0°C至100°C的温度变化下提供1.181V的输出电压,对应于19ppm/°C的TC。输出参考电压呈现2.4mV/V的线性变化,典型工艺角供电范围为1.62V至1.98V。在该带隙中加入单级折叠级联运算放大器,提高了闭环输出电压的稳定性、BGR的电源抑制比(PSRR)和输入共模范围。该电路包括启动电路,避免了闭环导致的启动问题,运算放大器的参考电流由BGR电流镜产生,其TC对最终VREF的影响可以忽略不计。仿真结果表明,在直流至30KHz范围内,所提BGR的PSRR为-43db,相位裕度为70°,运放输入偏置为1.96μV,运放闭环增益为118dB。整机BGR总电流为12μA,总功耗为18.4μW。采用Mentor-Graphics的Pyxis工具和Eldo-Spice模拟器在130nm CMOS技术下对所提出的带隙参考进行了仿真。所提出的BGR输出用于低降差(LDO)稳压电路,该电路工作在3.3V电源下,并提供1.8V的稳压输出。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Design and implementation of BiCMOS based low temperature coefficient bandgap reference using 130nm technology
BiCMOS bandgap reference (BGR) has advantage over MOS based BGR in terms of its accuracy at its reference output and very less temperature coefficient (TC). This paper presents bandgap reference circuit with folded cascode operational amplifier (op-amp) in order to improve the stability of final VREF output. The temperature stability of output can be improved by using trimming circuit in voltage mode architecture of bandgap reference operating with less power consumption. Using only first order temperature compensation technique, the proposed circuit gives output voltage of 1.181V with 0 °C to 100 °C temperature variations that corresponds to TC of 19ppm/ °C. The output reference voltage exhibits line variations of 2.4mV/V with supply range of 1.62V to 1.98V at typical process corner. A single stage folded cascode op-amp that is included in the proposed bandgap improves the stability of output voltage in closed loop, power supply rejection ratio (PSRR) of BGR and input common mode range. The proposed circuit includes start-up circuit to avoid start-up problem because of closed loop, the reference current for op-amp is generated from BGR current mirror and impact of its TC on final VREF is negligible. The simulation results shows that PSRR of proposed BGR is -43db from dc to 30KHz frequency, Phase margin (PM) is 70°, input offset of op-amp is 1.96μV and closed loop gain of op-amp in BGR is 118dB. The total current for overall BGR is 12μA and total power consumption is 18.4μW. The proposed bandgap reference is simulated using Mentor-Graphics Pyxis tool, Eldo-Spice simulator in 130nm CMOS technology. The proposed BGR output is used in low-drop-out (LDO) regulator circuit that is operating at 3.3V supply and gives regulated output of 1.8V.
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