{"title":"可重构合成仪器在输入/输出(I/O)总线自动测试中的有效应用","authors":"L. Ungar, N. Jacobson, T. M. Mak, Craig D. Stoldt","doi":"10.1109/AUTOTESTCON47462.2022.9984743","DOIUrl":null,"url":null,"abstract":"Military test activities aim to minimize the number of unique test and diagnostic equipment on hand in their facilities. With a multitude of bus standards, bus testing requires either a general test instrument approach or a variety of unique testers. The former complicates test program development, and the latter would result in the proliferation of unique automatic test systems. A synthetic instrument (SI) is a test instrument that can be realized (i.e., synthesized) within the fabric of a field programmable gate array (FPGA). This paper will discuss how use of SIs offers many benefits including lower test development cost, higher accuracy, higher speed and reconfigurability. Bus testing approaches are discussed and then shown to improve with the use of SIs. It highlights benefits of SIs in general and focuses on how SIs help to overcome many of the obstacles test engineers face in controlling buses. SIs also address the high-speed barrier in testing, since FPGAs that host these SIs incorporate multi-gigabit per second transceivers. Bus standards typically incorporate complex protocols. The test program developer needs to understand both the normal operation and failure modes to develop complete test suites. Since SIs can easily implement the bus controller logic and state machine, this frees the test engineer from descending to that level of detail. SIs can be created for many, if not all, serial and parallel, low-speed, and high-speed digital I/O buses. These strengths allow SIs to supply services that the test engineer can use to greatly reduce TPS development costs. With SIs used as a standard bus test instrument accessible to any ATE, the industry will gain a crucial resource for test development cost and time reduction.","PeriodicalId":298798,"journal":{"name":"2022 IEEE AUTOTESTCON","volume":"120 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-08-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"Effective use of Reconfigurable Synthetic Instruments in Automatic Testing of Input/Output (I/O) Buses\",\"authors\":\"L. Ungar, N. Jacobson, T. M. Mak, Craig D. Stoldt\",\"doi\":\"10.1109/AUTOTESTCON47462.2022.9984743\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Military test activities aim to minimize the number of unique test and diagnostic equipment on hand in their facilities. With a multitude of bus standards, bus testing requires either a general test instrument approach or a variety of unique testers. The former complicates test program development, and the latter would result in the proliferation of unique automatic test systems. A synthetic instrument (SI) is a test instrument that can be realized (i.e., synthesized) within the fabric of a field programmable gate array (FPGA). This paper will discuss how use of SIs offers many benefits including lower test development cost, higher accuracy, higher speed and reconfigurability. Bus testing approaches are discussed and then shown to improve with the use of SIs. It highlights benefits of SIs in general and focuses on how SIs help to overcome many of the obstacles test engineers face in controlling buses. SIs also address the high-speed barrier in testing, since FPGAs that host these SIs incorporate multi-gigabit per second transceivers. Bus standards typically incorporate complex protocols. The test program developer needs to understand both the normal operation and failure modes to develop complete test suites. Since SIs can easily implement the bus controller logic and state machine, this frees the test engineer from descending to that level of detail. SIs can be created for many, if not all, serial and parallel, low-speed, and high-speed digital I/O buses. These strengths allow SIs to supply services that the test engineer can use to greatly reduce TPS development costs. With SIs used as a standard bus test instrument accessible to any ATE, the industry will gain a crucial resource for test development cost and time reduction.\",\"PeriodicalId\":298798,\"journal\":{\"name\":\"2022 IEEE AUTOTESTCON\",\"volume\":\"120 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2022-08-29\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2022 IEEE AUTOTESTCON\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/AUTOTESTCON47462.2022.9984743\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 IEEE AUTOTESTCON","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/AUTOTESTCON47462.2022.9984743","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Effective use of Reconfigurable Synthetic Instruments in Automatic Testing of Input/Output (I/O) Buses
Military test activities aim to minimize the number of unique test and diagnostic equipment on hand in their facilities. With a multitude of bus standards, bus testing requires either a general test instrument approach or a variety of unique testers. The former complicates test program development, and the latter would result in the proliferation of unique automatic test systems. A synthetic instrument (SI) is a test instrument that can be realized (i.e., synthesized) within the fabric of a field programmable gate array (FPGA). This paper will discuss how use of SIs offers many benefits including lower test development cost, higher accuracy, higher speed and reconfigurability. Bus testing approaches are discussed and then shown to improve with the use of SIs. It highlights benefits of SIs in general and focuses on how SIs help to overcome many of the obstacles test engineers face in controlling buses. SIs also address the high-speed barrier in testing, since FPGAs that host these SIs incorporate multi-gigabit per second transceivers. Bus standards typically incorporate complex protocols. The test program developer needs to understand both the normal operation and failure modes to develop complete test suites. Since SIs can easily implement the bus controller logic and state machine, this frees the test engineer from descending to that level of detail. SIs can be created for many, if not all, serial and parallel, low-speed, and high-speed digital I/O buses. These strengths allow SIs to supply services that the test engineer can use to greatly reduce TPS development costs. With SIs used as a standard bus test instrument accessible to any ATE, the industry will gain a crucial resource for test development cost and time reduction.