可重构合成仪器在输入/输出(I/O)总线自动测试中的有效应用

L. Ungar, N. Jacobson, T. M. Mak, Craig D. Stoldt
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引用次数: 2

摘要

军事测试活动的目的是尽量减少其设施中现有的独特测试和诊断设备的数量。由于总线标准众多,总线测试要么需要通用的测试仪器方法,要么需要各种独特的测试仪。前者使测试程序的开发复杂化,而后者将导致独特的自动测试系统的激增。合成仪器(SI)是一种可以在现场可编程门阵列(FPGA)结构内实现(即合成)的测试仪器。本文将讨论si的使用如何提供许多好处,包括更低的测试开发成本,更高的准确性,更高的速度和可重构性。讨论了总线测试方法,然后展示了使用si可以改进总线测试方法。它强调了集成电路的总体优势,并重点介绍了集成电路如何帮助工程师克服控制总线时所面临的许多障碍。si还解决了测试中的高速障碍,因为承载这些si的fpga包含每秒千兆比特的收发器。总线标准通常包含复杂的协议。测试程序开发人员需要了解正常操作和故障模式,以开发完整的测试套件。由于si可以很容易地实现总线控制器逻辑和状态机,这使测试工程师不必下降到该详细级别。可以为许多(如果不是全部的话)串行和并行、低速和高速数字I/O总线创建si。这些优势使si能够提供测试工程师可以使用的服务,从而大大降低TPS的开发成本。随着si被用作任何ATE都可以访问的标准总线测试仪器,行业将获得测试开发成本和减少时间的关键资源。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Effective use of Reconfigurable Synthetic Instruments in Automatic Testing of Input/Output (I/O) Buses
Military test activities aim to minimize the number of unique test and diagnostic equipment on hand in their facilities. With a multitude of bus standards, bus testing requires either a general test instrument approach or a variety of unique testers. The former complicates test program development, and the latter would result in the proliferation of unique automatic test systems. A synthetic instrument (SI) is a test instrument that can be realized (i.e., synthesized) within the fabric of a field programmable gate array (FPGA). This paper will discuss how use of SIs offers many benefits including lower test development cost, higher accuracy, higher speed and reconfigurability. Bus testing approaches are discussed and then shown to improve with the use of SIs. It highlights benefits of SIs in general and focuses on how SIs help to overcome many of the obstacles test engineers face in controlling buses. SIs also address the high-speed barrier in testing, since FPGAs that host these SIs incorporate multi-gigabit per second transceivers. Bus standards typically incorporate complex protocols. The test program developer needs to understand both the normal operation and failure modes to develop complete test suites. Since SIs can easily implement the bus controller logic and state machine, this frees the test engineer from descending to that level of detail. SIs can be created for many, if not all, serial and parallel, low-speed, and high-speed digital I/O buses. These strengths allow SIs to supply services that the test engineer can use to greatly reduce TPS development costs. With SIs used as a standard bus test instrument accessible to any ATE, the industry will gain a crucial resource for test development cost and time reduction.
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