FASE:用于半导体制造的调度环境

J. Shiu, T.-K. Hwang, Yen-Wen Huang, C. Tsai, W. Su, Y. Cheng, Shi-Chung Chang, C. Chien
{"title":"FASE:用于半导体制造的调度环境","authors":"J. Shiu, T.-K. Hwang, Yen-Wen Huang, C. Tsai, W. Su, Y. Cheng, Shi-Chung Chang, C. Chien","doi":"10.1109/IEMT.1996.559679","DOIUrl":null,"url":null,"abstract":"FASE is a computer-aided scheduling environment developed for semiconductor fabrication. Its current version includes: (1) a mid-term and daily scheduler, (2) a machine variability analyzer, (3) a what-if analysis tool and (4) a friendly graphic user interface (GUI). The scheduler is extended from an optimization-based scheduler for a R&D pilot line to a mass production fab application. To identify capacity and cycle time bottlenecks, a variability analyzer is developed, which functions jointly with the scheduler. The what-if analysis tool combines GUI technique, the scheduler and the variability analyzer to answer what-if questions on capacity variation, desired output variation, etc. Test results using field data indicate that FASE provides an decision aid in addressing many issues encountered in scheduling semiconductor fabrication.","PeriodicalId":177653,"journal":{"name":"Nineteenth IEEE/CPMT International Electronics Manufacturing Technology Symposium","volume":"24 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1996-10-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":"{\"title\":\"FASE: a scheduling environment for semiconductor fabrication\",\"authors\":\"J. Shiu, T.-K. Hwang, Yen-Wen Huang, C. Tsai, W. Su, Y. Cheng, Shi-Chung Chang, C. Chien\",\"doi\":\"10.1109/IEMT.1996.559679\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"FASE is a computer-aided scheduling environment developed for semiconductor fabrication. Its current version includes: (1) a mid-term and daily scheduler, (2) a machine variability analyzer, (3) a what-if analysis tool and (4) a friendly graphic user interface (GUI). The scheduler is extended from an optimization-based scheduler for a R&D pilot line to a mass production fab application. To identify capacity and cycle time bottlenecks, a variability analyzer is developed, which functions jointly with the scheduler. The what-if analysis tool combines GUI technique, the scheduler and the variability analyzer to answer what-if questions on capacity variation, desired output variation, etc. Test results using field data indicate that FASE provides an decision aid in addressing many issues encountered in scheduling semiconductor fabrication.\",\"PeriodicalId\":177653,\"journal\":{\"name\":\"Nineteenth IEEE/CPMT International Electronics Manufacturing Technology Symposium\",\"volume\":\"24 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1996-10-14\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"4\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Nineteenth IEEE/CPMT International Electronics Manufacturing Technology Symposium\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IEMT.1996.559679\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Nineteenth IEEE/CPMT International Electronics Manufacturing Technology Symposium","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IEMT.1996.559679","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4

摘要

FASE是为半导体制造而开发的计算机辅助调度环境。其当前版本包括:(1)中期和每日调度程序,(2)机器变异性分析仪,(3)假设分析工具和(4)友好的图形用户界面(GUI)。该调度器从基于优化的研发试验线调度器扩展到大规模生产工厂应用程序。为了识别容量和周期时间瓶颈,开发了一个可变性分析器,它与调度程序一起工作。假设分析工具结合了GUI技术、调度程序和可变性分析器来回答关于容量变化、期望输出变化等假设问题。使用现场数据的测试结果表明,FASE为解决半导体制造调度中遇到的许多问题提供了决策辅助。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
FASE: a scheduling environment for semiconductor fabrication
FASE is a computer-aided scheduling environment developed for semiconductor fabrication. Its current version includes: (1) a mid-term and daily scheduler, (2) a machine variability analyzer, (3) a what-if analysis tool and (4) a friendly graphic user interface (GUI). The scheduler is extended from an optimization-based scheduler for a R&D pilot line to a mass production fab application. To identify capacity and cycle time bottlenecks, a variability analyzer is developed, which functions jointly with the scheduler. The what-if analysis tool combines GUI technique, the scheduler and the variability analyzer to answer what-if questions on capacity variation, desired output variation, etc. Test results using field data indicate that FASE provides an decision aid in addressing many issues encountered in scheduling semiconductor fabrication.
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