{"title":"纳米电子电路设计的镶嵌方法","authors":"Matteo Bollo, G. Santoro, U. Garlando, M. Zamboni","doi":"10.1109/DTIS.2017.7930161","DOIUrl":null,"url":null,"abstract":"In this paper we present a tool, NANOcom, specifically developed for the bottom-up design and formalization of electronic circuits with a regular, matrix-like, structure. NANOcom allows to easily describe any kind of circuits and technologies where neighboring logic elements are dynamically coupled. Logic elements and interconnections are placed on a three-dimensional grid. Each element is characterized with an RTL model that describes its logic behavior and how it communicates with neighboring elements. Starting from the grid layout and the model, NANOcom automatically creates a VHDL code describing the whole structure. NANOcom can be used to simulate both standard CMOS circuits, such as PLAs, and new emerging technologies, like NASICs (Nanoscale Application Specific Integrated Circuits), memristor-based circuits and field coupled technologies, such as Nanomagnet Logic (NML), Quantum dot Cellular Automata (QCA) and Molecular QCA.","PeriodicalId":328905,"journal":{"name":"2017 12th International Conference on Design & Technology of Integrated Systems In Nanoscale Era (DTIS)","volume":"320 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2017-04-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"NANOcom: A Mosaic Approach for nanoelectronic circuits design\",\"authors\":\"Matteo Bollo, G. Santoro, U. Garlando, M. Zamboni\",\"doi\":\"10.1109/DTIS.2017.7930161\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper we present a tool, NANOcom, specifically developed for the bottom-up design and formalization of electronic circuits with a regular, matrix-like, structure. NANOcom allows to easily describe any kind of circuits and technologies where neighboring logic elements are dynamically coupled. Logic elements and interconnections are placed on a three-dimensional grid. Each element is characterized with an RTL model that describes its logic behavior and how it communicates with neighboring elements. Starting from the grid layout and the model, NANOcom automatically creates a VHDL code describing the whole structure. NANOcom can be used to simulate both standard CMOS circuits, such as PLAs, and new emerging technologies, like NASICs (Nanoscale Application Specific Integrated Circuits), memristor-based circuits and field coupled technologies, such as Nanomagnet Logic (NML), Quantum dot Cellular Automata (QCA) and Molecular QCA.\",\"PeriodicalId\":328905,\"journal\":{\"name\":\"2017 12th International Conference on Design & Technology of Integrated Systems In Nanoscale Era (DTIS)\",\"volume\":\"320 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2017-04-04\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2017 12th International Conference on Design & Technology of Integrated Systems In Nanoscale Era (DTIS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/DTIS.2017.7930161\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2017 12th International Conference on Design & Technology of Integrated Systems In Nanoscale Era (DTIS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DTIS.2017.7930161","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
NANOcom: A Mosaic Approach for nanoelectronic circuits design
In this paper we present a tool, NANOcom, specifically developed for the bottom-up design and formalization of electronic circuits with a regular, matrix-like, structure. NANOcom allows to easily describe any kind of circuits and technologies where neighboring logic elements are dynamically coupled. Logic elements and interconnections are placed on a three-dimensional grid. Each element is characterized with an RTL model that describes its logic behavior and how it communicates with neighboring elements. Starting from the grid layout and the model, NANOcom automatically creates a VHDL code describing the whole structure. NANOcom can be used to simulate both standard CMOS circuits, such as PLAs, and new emerging technologies, like NASICs (Nanoscale Application Specific Integrated Circuits), memristor-based circuits and field coupled technologies, such as Nanomagnet Logic (NML), Quantum dot Cellular Automata (QCA) and Molecular QCA.