A. Grill, D. Edelstein, D. Restaino, M. Lane, S. Gates, E. Liniger, T. Shaw, X. Liu, D. Klaus, V. Patel, S. Cohen, E. Simonyi, N. Klymko, S. Lane, K. Ida, S. Vogt, T. Van Kleeck, C. Davis, M. Ono, T. Nogami, T. Ivers
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Optimization of SiCOH dielectrics for integration in a 90nm CMOS technology
The research integration of SiCOH films in a reliable ULSI integrated circuit chip imposes many requirements on the properties of the dielectric material. This paper describes a selection and optimization process for choosing the best film to be integrated in Cu wiring levels of ULSI CMOS chips in the 90 nm technology node.