一种用于ADSL/VDSL模拟前端的3nV/vHz可编程增益/BW混合信号4阶切比雪夫高通滤波器

2014 Symposium on VLSI Circuits Digest of Technical Papers Pub Date : 2014-06-10 DOI:10.1109/VLSIC.2014.6858436

Harsh Mehta, G. Krishnamurthy, M. Inerfield, Fang Lin, T. Kwan

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摘要

提出了一种四阶切比雪夫高通滤波器(HPF)，其输入参考噪声为3 nV/√Hz, MTPR大于72 dB，功耗小于81 mW，面积为0.7 mm2。面积和功耗的减少是通过混合信号滤波器拓扑实现的。

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A 3nV/vHz programmable gain/BW mixed-signal 4th order Chebyshev high-pass filter for ADSL/VDSL analog front end in 28nm CMOS

A fourth-order Chebyshev high-pass filter (HPF) that achieves input-referred noise of 3 nV/√Hz, MTPR greater than 72 dB, and power consumption of less than 81 mW with 0.7 mm2 area in 28 nm CMOS is presented. Area and power reductions are realized via a mixed-signal filter topology.

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2014 Symposium on VLSI Circuits Digest of Technical Papers

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