{"title":"一种低功耗FIR滤波器，采用组合残数和基数2符号数表示","authors":"Andreas Lindahl, L. Bengtsson","doi":"10.1109/DSD.2005.8","DOIUrl":null,"url":null,"abstract":"This paper presents a FIR filter combining residue (RNS) and radix-2 signed digit (SD) representation. RNS offers parallelization of the computations and SD carry-free additions. The moduli set {2/sup n/-1, 2/sup n/, 2/sup n/+1} is used reducing the complexity of the RNS arithmetic units. The evaluated filters have 8, 12 and 16 taps, binary word lengths between 16 and 64 bits, and have been synthesized using a UMC 0.13 /spl mu/m CMOS cell library with 8 metal layers. Power, delay, and area comparisons are made with equivalent 2's complement designs. The area-delay and area-delay-power products shows that reduction in both power and area at the same filter throughput can be expected.","PeriodicalId":119054,"journal":{"name":"8th Euromicro Conference on Digital System Design (DSD'05)","volume":"31 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2005-08-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"12","resultStr":"{\"title\":\"A low-power FIR filter using combined residue and radix-2 signed-digit representation\",\"authors\":\"Andreas Lindahl, L. Bengtsson\",\"doi\":\"10.1109/DSD.2005.8\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents a FIR filter combining residue (RNS) and radix-2 signed digit (SD) representation. RNS offers parallelization of the computations and SD carry-free additions. The moduli set {2/sup n/-1, 2/sup n/, 2/sup n/+1} is used reducing the complexity of the RNS arithmetic units. The evaluated filters have 8, 12 and 16 taps, binary word lengths between 16 and 64 bits, and have been synthesized using a UMC 0.13 /spl mu/m CMOS cell library with 8 metal layers. Power, delay, and area comparisons are made with equivalent 2's complement designs. The area-delay and area-delay-power products shows that reduction in both power and area at the same filter throughput can be expected.\",\"PeriodicalId\":119054,\"journal\":{\"name\":\"8th Euromicro Conference on Digital System Design (DSD'05)\",\"volume\":\"31 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2005-08-30\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"12\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"8th Euromicro Conference on Digital System Design (DSD'05)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/DSD.2005.8\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"8th Euromicro Conference on Digital System Design (DSD'05)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DSD.2005.8","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A low-power FIR filter using combined residue and radix-2 signed-digit representation
This paper presents a FIR filter combining residue (RNS) and radix-2 signed digit (SD) representation. RNS offers parallelization of the computations and SD carry-free additions. The moduli set {2/sup n/-1, 2/sup n/, 2/sup n/+1} is used reducing the complexity of the RNS arithmetic units. The evaluated filters have 8, 12 and 16 taps, binary word lengths between 16 and 64 bits, and have been synthesized using a UMC 0.13 /spl mu/m CMOS cell library with 8 metal layers. Power, delay, and area comparisons are made with equivalent 2's complement designs. The area-delay and area-delay-power products shows that reduction in both power and area at the same filter throughput can be expected.
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