{"title":"用于空间应用的CMOS/SOS电路","authors":"H. Veloric, R. Green","doi":"10.1109/SOI.1988.95457","DOIUrl":null,"url":null,"abstract":"Summary form only given. The authors have investigated the capability of CMOS/SOS circuits fabricated in a 1.25- mu m DLM technology. The circuits included delay chains, a shift register, gate arrays, and a 8KX8 SRAM. Accurate circuit simulations were possible using the device parameters and current modeling procedures. The preradiation and postradiation performances of circuits were compared to their calculated capability. This included performance under transient radiation conditions. 64K SRAMS were fabricated with an access time under 20 ns. These circuits have demonstrated total dose tolerance in excess of 1 Mrad (Si) and transient upset of 5*10/sup 11/ rad (Si)/s.<<ETX>>","PeriodicalId":391934,"journal":{"name":"Proceedings. SOS/SOI Technology Workshop","volume":"29 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1988-10-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"CMOS/SOS circuits for space applications\",\"authors\":\"H. Veloric, R. Green\",\"doi\":\"10.1109/SOI.1988.95457\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Summary form only given. The authors have investigated the capability of CMOS/SOS circuits fabricated in a 1.25- mu m DLM technology. The circuits included delay chains, a shift register, gate arrays, and a 8KX8 SRAM. Accurate circuit simulations were possible using the device parameters and current modeling procedures. The preradiation and postradiation performances of circuits were compared to their calculated capability. This included performance under transient radiation conditions. 64K SRAMS were fabricated with an access time under 20 ns. These circuits have demonstrated total dose tolerance in excess of 1 Mrad (Si) and transient upset of 5*10/sup 11/ rad (Si)/s.<<ETX>>\",\"PeriodicalId\":391934,\"journal\":{\"name\":\"Proceedings. SOS/SOI Technology Workshop\",\"volume\":\"29 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1988-10-03\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings. SOS/SOI Technology Workshop\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SOI.1988.95457\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings. SOS/SOI Technology Workshop","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SOI.1988.95457","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
摘要
只提供摘要形式。作者研究了用1.25 μ m DLM技术制作的CMOS/SOS电路的性能。电路包括延迟链、移位寄存器、门阵列和8KX8 SRAM。利用器件参数和当前的建模程序，可以实现精确的电路仿真。将电路的前辐射和后辐射性能与其计算能力进行了比较。这包括在瞬态辐射条件下的性能。制备了存取时间小于20ns的64K ram。这些电路的总耐受剂量超过1mrad (Si)，瞬态扰动为5*10/sup / 11/ rad (Si)/s。
Summary form only given. The authors have investigated the capability of CMOS/SOS circuits fabricated in a 1.25- mu m DLM technology. The circuits included delay chains, a shift register, gate arrays, and a 8KX8 SRAM. Accurate circuit simulations were possible using the device parameters and current modeling procedures. The preradiation and postradiation performances of circuits were compared to their calculated capability. This included performance under transient radiation conditions. 64K SRAMS were fabricated with an access time under 20 ns. These circuits have demonstrated total dose tolerance in excess of 1 Mrad (Si) and transient upset of 5*10/sup 11/ rad (Si)/s.<>
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