{"title":"系统,纳米技术和SiP","authors":"R. P. D. Vries","doi":"10.1109/VLSID.2007.152","DOIUrl":null,"url":null,"abstract":"The on-going trend towards nanoscale technologies creates enormous opportunities for integration of complex functions and features. Many challenges have to be overcome in order to exploit nanoscale technologies for mass production: particularly relevant are CMOS SoC challenges such as low power, design for manufacturability and analog design. However, in order to provide a usable electronic function, any SoC needs to be packaged or assembled in a system in package, with its own set of challenges and requirements. The authors illustrate how NXP Semiconductors is overcoming the above","PeriodicalId":382435,"journal":{"name":"VLSI design (Print)","volume":"39 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2007-01-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Systems, Nano-technology and SiP\",\"authors\":\"R. P. D. Vries\",\"doi\":\"10.1109/VLSID.2007.152\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The on-going trend towards nanoscale technologies creates enormous opportunities for integration of complex functions and features. Many challenges have to be overcome in order to exploit nanoscale technologies for mass production: particularly relevant are CMOS SoC challenges such as low power, design for manufacturability and analog design. However, in order to provide a usable electronic function, any SoC needs to be packaged or assembled in a system in package, with its own set of challenges and requirements. The authors illustrate how NXP Semiconductors is overcoming the above\",\"PeriodicalId\":382435,\"journal\":{\"name\":\"VLSI design (Print)\",\"volume\":\"39 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2007-01-06\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"VLSI design (Print)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/VLSID.2007.152\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"VLSI design (Print)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSID.2007.152","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
The on-going trend towards nanoscale technologies creates enormous opportunities for integration of complex functions and features. Many challenges have to be overcome in order to exploit nanoscale technologies for mass production: particularly relevant are CMOS SoC challenges such as low power, design for manufacturability and analog design. However, in order to provide a usable electronic function, any SoC needs to be packaged or assembled in a system in package, with its own set of challenges and requirements. The authors illustrate how NXP Semiconductors is overcoming the above