harts项目硬件应用平台

Immacolata Colacicco, G. Marchiori, R. Tripiccione
{"title":"harts项目硬件应用平台","authors":"Immacolata Colacicco, G. Marchiori, R. Tripiccione","doi":"10.1109/FPL.2008.4629978","DOIUrl":null,"url":null,"abstract":"We describe the hardware platform that will be used to run several demonstrator applications within the EU-funded hArtes project. hArtes' main goal is to support, with appropriate tools, the development of complex applications on heterogeneous and reconfigurable systems. Our platform provides a number of heterogeneous computing sub-systems, such as DSPs, general-purpose CPUs and configurable elements (in the shape of FPGAs). The envisaged applications are mainly in the audio realm, so support for high-quality audio I/O is also present. FPGAs play a dual role: i) they support I/O functions for audio streaming, moving audio signals from/to main memory with full hardware support; ii) tightly coupled to traditional processors, they make up the reconfigurable processing core within the system. This paper describes the architecture and the first implementation of the platform.","PeriodicalId":137963,"journal":{"name":"2008 International Conference on Field Programmable Logic and Applications","volume":"120 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2008-09-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":"{\"title\":\"The hardware application platform of the hartes project\",\"authors\":\"Immacolata Colacicco, G. Marchiori, R. Tripiccione\",\"doi\":\"10.1109/FPL.2008.4629978\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"We describe the hardware platform that will be used to run several demonstrator applications within the EU-funded hArtes project. hArtes' main goal is to support, with appropriate tools, the development of complex applications on heterogeneous and reconfigurable systems. Our platform provides a number of heterogeneous computing sub-systems, such as DSPs, general-purpose CPUs and configurable elements (in the shape of FPGAs). The envisaged applications are mainly in the audio realm, so support for high-quality audio I/O is also present. FPGAs play a dual role: i) they support I/O functions for audio streaming, moving audio signals from/to main memory with full hardware support; ii) tightly coupled to traditional processors, they make up the reconfigurable processing core within the system. This paper describes the architecture and the first implementation of the platform.\",\"PeriodicalId\":137963,\"journal\":{\"name\":\"2008 International Conference on Field Programmable Logic and Applications\",\"volume\":\"120 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2008-09-23\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"6\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2008 International Conference on Field Programmable Logic and Applications\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/FPL.2008.4629978\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2008 International Conference on Field Programmable Logic and Applications","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/FPL.2008.4629978","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 6

摘要

我们描述了硬件平台,该平台将用于在欧盟资助的hArtes项目中运行几个演示应用程序。hArtes的主要目标是使用适当的工具支持在异构和可重构系统上开发复杂的应用程序。我们的平台提供了许多异构计算子系统,如dsp、通用cpu和可配置元素(以fpga的形式)。所设想的应用程序主要是在音频领域,因此也存在对高质量音频I/O的支持。fpga发挥双重作用:i)它们支持音频流的i /O功能,在完全硬件支持的情况下将音频信号从/移到主存储器;Ii)与传统处理器紧密耦合,它们构成了系统内可重构的处理核心。本文介绍了该平台的体系结构和初步实现。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
The hardware application platform of the hartes project
We describe the hardware platform that will be used to run several demonstrator applications within the EU-funded hArtes project. hArtes' main goal is to support, with appropriate tools, the development of complex applications on heterogeneous and reconfigurable systems. Our platform provides a number of heterogeneous computing sub-systems, such as DSPs, general-purpose CPUs and configurable elements (in the shape of FPGAs). The envisaged applications are mainly in the audio realm, so support for high-quality audio I/O is also present. FPGAs play a dual role: i) they support I/O functions for audio streaming, moving audio signals from/to main memory with full hardware support; ii) tightly coupled to traditional processors, they make up the reconfigurable processing core within the system. This paper describes the architecture and the first implementation of the platform.
求助全文
通过发布文献求助,成功后即可免费获取论文全文。 去求助
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术官方微信