DPCNN:用于细胞神经网络的可编程混合模拟-数字芯片

1996 Fourth IEEE International Workshop on Cellular Neural Networks and their Applications Proceedings (CNNA-96) Pub Date : 1996-06-24 DOI:10.1109/CNNA.1996.566616

M. Salerno, F. Sargeni, V. Bonaiuto

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引用次数: 29

摘要

多功能VLSI芯片的实现是开发细胞神经网络(CNN)的重要一步。本文提出了一种面向多芯片的6/spl倍/6数字可编程细胞神经网络(6/spl倍/6 DPCNN)芯片的VLSI实现方法。该芯片涵盖了图像处理应用中大多数可用的单邻域模板。此外，它可以很容易地相互连接，形成非常大的CNN阵列。

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6/spl times/6 DPCNN: a programmable mixed analogue-digital chip for cellular neural networks

The implementation of a versatile VLSI chip represents an important step to develop cellular neural networks (CNN). In this paper a VLSI realization of the multi-chip oriented, 6/spl times/6 digitally programmable cellular neural network (6/spl times/6 DPCNN) chip, is presented. This chip covers most of the available one-neighbourhood templates for image processing applications. Moreover, it can be easily interconnected to others to form very large CNN arrays.

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来源期刊

1996 Fourth IEEE International Workshop on Cellular Neural Networks and their Applications Proceedings (CNNA-96)

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