具有多千兆接收器和慢反馈通道的集成电路特性的同步概念

Martin Schmidt, Jianxiong Zhang, Thomas Fohn, M. Grozing, M. Berroth
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引用次数: 2

摘要

本文提出了一种离线同步的概念,用于在Gb/s范围内工作的集成电路的特性。该概念依赖于使用可编程FPGA板,具有快速发射器,可配置延迟板和接收器侧的欠采样测试寄存器。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Synchronization concept for the characterization of integrated circuits with multi-gigabit receivers and a slow feedback channel
This paper presents an off-line synchronization concept for the characterization of integrated circuits with receivers operating in the Gb/s range. The concept relies on the use of a programmable FPGA board with fast transmitters, a configurable delay board and an undersampling test register at the receiver side.
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