图像和视频处理采用majc5200

Proceedings 2000 International Conference on Image Processing (Cat. No.00CH37101) Pub Date : 2000-09-10 DOI:10.1109/ICIP.2000.899310

S. Sudharsanan, P. Sriram, Hans Frederickson, A. Gulati

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引用次数: 16

摘要

新推出的用于Java计算的微处理器体系结构(MAJC)支持层次结构中的并行性:芯片上的多处理器、垂直微线程、通过超长指令字体系结构(VLIW)和SIMD实现的指令级并行性。第一个实现是MAJC 5200，它包含了MAJC的一些关键特性来实现高性能多媒体处理器。芯片集成了两个500mhz的cpu，提供6.16 GFLOPS和12.33 GFLOPS的高速接口，峰值I/O数据速率超过4.8 gb /s。该芯片适用于许多应用，包括高端机顶盒的图形/多媒体处理，电信的数字语音处理和高级成像。

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Image and video processing using MAJC 5200

The newly introduced Microprocessor Architecture for Java Computing (MAJC) supports parallelism in a hierarchy of levels: multiprocessors on chip, vertical micro threading, instruction level parallelism via a very long instruction word architecture (VLIW) and SIMD. The first implementation, MAJC 5200, includes some key features of MAJC to realize a high performance multimedia processor. Two CPUs running at 500 MHz are integrated into the chip to provide 6.16 GFLOPS and 12.33 GOPS with high speed interfaces providing a peak input-output (I/O) data rate of more than 4.8 GBytes/second. The chip is suitable for a number of applications including graphics/multimedia processing for high-end set-top boxes, digital voice processing for telecommunications, and advanced imaging.

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Proceedings 2000 International Conference on Image Processing (Cat. No.00CH37101)

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