FRA: flash存储设备的flash感知冗余阵列

Yangsup Lee, Sanghyuk Jung, Y. Song
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引用次数: 76

摘要

由于闪存具有高性能、无易失性、低功耗和抗冲击等优点,已广泛应用于嵌入式和计算机系统环境中作为存储介质。然而,就可靠性而言,闪存存在许多缺点:由于写前擦除,可能存在较高的I/O延迟;由于擦除周期有限,持久性较差。为了克服这些问题,采用了借鉴基于硬盘的存储技术的RAID技术。在RAID技术中,可以很容易地检测和纠正页面、块或设备中的多位突发故障,从而大大提高了可靠性。然而,现有的基于闪存的RAID-5方案延迟了奇偶更新的响应时间。为了克服这个问题,我们提出了一种使用闪存中的RAID技术的新方法,称为闪存感知冗余阵列。在这种方法中,奇偶校验更新被延迟,因此它们不包括在读写操作的关键路径中。相反,它们是在设备空闲时安排的。例如,与其他方法相比,所提出的方案在平均写响应时间上提高了19%。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
FRA: a flash-aware redundancy array of flash storage devices
Since flash memory has many attractive characteristics such as high performance, non-volatility, low power consumption and shock resistance, it has been widely used as storage media in the embedded and computer system environments. In the case of reliability, however, there are many shortcomings in flash memory: potentially high I/O latency due to erase-before-write and poor durability due to limited erase cycles. To overcome these problems, a RAID technique borrowed from storage technology based on hard disks is employed. In the RAID technology, multi-bit burst failures in the page, block or device are easily detected and corrected so that the reliability can be significantly enhanced. However the existing RAID-5 scheme for the flash-based storage has delayed response time for parity updating. To overcome this problem, we propose a novel approach using a RAID technique in flash storage, called Flash-aware Redundancy Array. In this approach, parity updates are postponed so that they are not included in the critical path of read and write operations. Instead, they are scheduled for when the device becomes idle. For example, the proposed scheme shows a 19% improvement in the average write response time, compared to other approaches.
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