多米诺逻辑电路设计中的若干问题

Proceedings of the 8th Great Lakes Symposium on VLSI (Cat. No.98TB100222) Pub Date : 1998-02-19 DOI:10.1109/GLSV.1998.665208

Pranjal Srivastava, Andrew Pua, Larry Welch

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引用次数: 65

摘要

Domino逻辑电路在当今高性能处理器的设计中已经变得非常流行，因为它们提供了快速的切换速度和更小的面积。然而，多米诺逻辑的使用引入了许多设计风险，因为它对噪声、电路和布局拓扑非常敏感。本文确定了可能导致domino逻辑电路失败的问题，并讨论了缓解这些问题的一些可能的解决方案。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Issues in the design of domino logic circuits

Domino logic circuits have become extremely popular in the design of today's high performance processors because they offer fast switching speeds and reduced areas. However, the use of domino logic introduces many design risks because it is very sensitive to noise, circuit and layout topologies. This paper identifies issues that might cause domino logic circuits to fail, and discusses some possible solutions to alleviate these problems.

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Proceedings of the 8th Great Lakes Symposium on VLSI (Cat. No.98TB100222)

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