{"title":"用于物联网的61 μA/MHz可重构应用专用处理器和片上系统","authors":"Y. Huan, Ning Ma, S. Blixt, Z. Zou, Lirong Zheng","doi":"10.1109/SOCC.2015.7406954","DOIUrl":null,"url":null,"abstract":"This paper presents a SoC design that combines general purpose control and application-specific acceleration within a reconfigurable ASIP core for Internet-of-Things applications. Sufficient processing capability and re-configurability are provided by highly customizable data path and efficient sequence control loop. By fully utilizing the data path of proposed architecture, the processor significantly reduces >4X code size and offers superior performance compared with MSP430 and Atmega128 in FIR and Whetstone benchmarks. More than 10X speedup can be obtained in executing encryption algorithms by optimized micro-instructions without extra hardware accelerators. Fabricated in 0.18 μm CMOS, our SoC's energy efficiency beats most of the microcontrollers with a value as low as 61 μA/MHz.","PeriodicalId":329464,"journal":{"name":"2015 28th IEEE International System-on-Chip Conference (SOCC)","volume":"213 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2015-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"A 61 μA/MHz reconfigurable application-specific processor and system-on-chip for Internet-of-Things\",\"authors\":\"Y. Huan, Ning Ma, S. Blixt, Z. Zou, Lirong Zheng\",\"doi\":\"10.1109/SOCC.2015.7406954\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents a SoC design that combines general purpose control and application-specific acceleration within a reconfigurable ASIP core for Internet-of-Things applications. Sufficient processing capability and re-configurability are provided by highly customizable data path and efficient sequence control loop. By fully utilizing the data path of proposed architecture, the processor significantly reduces >4X code size and offers superior performance compared with MSP430 and Atmega128 in FIR and Whetstone benchmarks. More than 10X speedup can be obtained in executing encryption algorithms by optimized micro-instructions without extra hardware accelerators. Fabricated in 0.18 μm CMOS, our SoC's energy efficiency beats most of the microcontrollers with a value as low as 61 μA/MHz.\",\"PeriodicalId\":329464,\"journal\":{\"name\":\"2015 28th IEEE International System-on-Chip Conference (SOCC)\",\"volume\":\"213 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2015-09-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2015 28th IEEE International System-on-Chip Conference (SOCC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SOCC.2015.7406954\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2015 28th IEEE International System-on-Chip Conference (SOCC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SOCC.2015.7406954","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A 61 μA/MHz reconfigurable application-specific processor and system-on-chip for Internet-of-Things
This paper presents a SoC design that combines general purpose control and application-specific acceleration within a reconfigurable ASIP core for Internet-of-Things applications. Sufficient processing capability and re-configurability are provided by highly customizable data path and efficient sequence control loop. By fully utilizing the data path of proposed architecture, the processor significantly reduces >4X code size and offers superior performance compared with MSP430 and Atmega128 in FIR and Whetstone benchmarks. More than 10X speedup can be obtained in executing encryption algorithms by optimized micro-instructions without extra hardware accelerators. Fabricated in 0.18 μm CMOS, our SoC's energy efficiency beats most of the microcontrollers with a value as low as 61 μA/MHz.