{"title":"eprom中与程序干扰应力有关的电荷损失","authors":"T. Miller, S. Illyés, D. Baglee","doi":"10.1109/RELPHY.1990.66079","DOIUrl":null,"url":null,"abstract":"Program disturb or V/sub t/ shifts due to bit line stress for EPROMs continues to be a major reliability issue among semiconductor manufacturers, but very little information exists on these mechanisms. It is shown that program disturb is a defect mechanism, and the effects of voltage and temperature are studied. The impact on programming and extended read cycles is also evaluated.<<ETX>>","PeriodicalId":409540,"journal":{"name":"28th Annual Proceedings on Reliability Physics Symposium","volume":"5 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1990-03-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":"{\"title\":\"Charge loss associated with program disturb stresses in EPROMs\",\"authors\":\"T. Miller, S. Illyés, D. Baglee\",\"doi\":\"10.1109/RELPHY.1990.66079\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Program disturb or V/sub t/ shifts due to bit line stress for EPROMs continues to be a major reliability issue among semiconductor manufacturers, but very little information exists on these mechanisms. It is shown that program disturb is a defect mechanism, and the effects of voltage and temperature are studied. The impact on programming and extended read cycles is also evaluated.<<ETX>>\",\"PeriodicalId\":409540,\"journal\":{\"name\":\"28th Annual Proceedings on Reliability Physics Symposium\",\"volume\":\"5 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1990-03-27\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"5\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"28th Annual Proceedings on Reliability Physics Symposium\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/RELPHY.1990.66079\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"28th Annual Proceedings on Reliability Physics Symposium","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/RELPHY.1990.66079","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Charge loss associated with program disturb stresses in EPROMs
Program disturb or V/sub t/ shifts due to bit line stress for EPROMs continues to be a major reliability issue among semiconductor manufacturers, but very little information exists on these mechanisms. It is shown that program disturb is a defect mechanism, and the effects of voltage and temperature are studied. The impact on programming and extended read cycles is also evaluated.<>