eprom中与程序干扰应力有关的电荷损失

T. Miller, S. Illyés, D. Baglee
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引用次数: 5

摘要

由于eprom的位线应力引起的程序干扰或V/sub /移位仍然是半导体制造商的主要可靠性问题,但关于这些机制的信息很少。结果表明程序干扰是一种缺陷机制,并研究了电压和温度对程序干扰的影响。对编程和延长读周期的影响也进行了评估
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Charge loss associated with program disturb stresses in EPROMs
Program disturb or V/sub t/ shifts due to bit line stress for EPROMs continues to be a major reliability issue among semiconductor manufacturers, but very little information exists on these mechanisms. It is shown that program disturb is a defect mechanism, and the effects of voltage and temperature are studied. The impact on programming and extended read cycles is also evaluated.<>
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