椭圆曲线公钥密码系统的软硬件协同设计

S. Janssens, J. Thomas, W. Borremans, P. Gijsels, I. Verbauwhede, F. Vercauteren, B. Preneel, J. Vandewalle
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引用次数: 35

摘要

本文讨论了在Atmel FPSLIC上实现椭圆曲线公钥密码系统,Atmel FPSLIC是一种集成了40k FPGA、AVR微控制器和一组外设的片上系统(SOC)。FPGA非常适合于底层有限域算法的有效实现。该软件有利于全局控制。我们使用标准基表示字段元素和投影坐标来实现组操作。该算法的计算结果与现有的硬件实现结果具有可比性。虽然还没有尝试减少硬件部分的关键路径延迟,但我们在速度和吞吐量方面取得了可喜的成果。实现了10mhz的时钟频率,但优化后必须实现更多。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Hardware/software co-design of an elliptic curve public-key cryptosystem
This contribution discusses an implementation of an elliptic curve public-key cryptosystem on the Atmel FPSLIC, a system on a chip (SOC) that integrates a 40 K FPGA with an AVR microcontroller and a set of peripherals. The FPGA is ideally suited for an efficient implementation of the underlying finite field arithmetic. The software benefits the global control. We use a standard basis representation for the field elements and projective coordinates to implement the group operation. The results for area are comparable with existing hardware implementations. Although no attempts have been made yet to reduce the critical path delay of the hardware part, we obtained promising results towards speed and throughput. A clock frequency of 10 MHz is realized, but a lot more must be possible after optimization.
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