A programmable motion estimator for a class of hierarchical algorithms

Future generations of video codecs need programmable video processing capabilities to extend the range of applications. A key component of the video codec design is the motion estimator. Because of its high computational requirements, a programmable motion estimator design must carefully balance its programmability and cost-effectiveness. In this paper we propose a distributed programmable motion estimator architecture and optimize its processing engine for hardware efficiency and the control engine for flexibility. The distributed architecture models motion estimation as searching through a tree of vector points, where the traversing functions are implemented in a multi-mode vector search engine and the hierarchy is constructed by an algorithm controller with flexible DMA transfers. Based on the distributed architecture a programmable motion estimator is implemented within a 0.5 /spl mu/m CMOS video codec for multiple video standards. The programmable motion estimator achieves near full search quality (degradation less than 0.1 dB for CIF 30 f/s H.261) with only 1/4 of processing and memory resources and can be reused for H.26X and MPEG coding across a wide range of resolution and video quality tradeoff points.