{"title":"头戴式显示器三维显示处理芯片的VLSI设计","authors":"Chenyang Ge, Nanning Zheng, K. Mei, Jizhong Zhao","doi":"10.1109/ICEGIC.2009.5293596","DOIUrl":null,"url":null,"abstract":"In order to develop the core chip supporting binocular stereo displays for head-mounted display (HMD) and glasses-TV, a VLSI design scheme is proposed by using pipeline architecture for 3D display processing chip (HMD100B). Some key techniques including stereo display processing and high precision video scaling based on bicubic interpolation, and their hardware implementations are presented. A new method of field rate up-conversion for analog stereo video signal (CVBS) is proposed, and it can eliminate the large area of flicker. The proposed HMD100B chip is verified by FPGA, and the stereo display image is clear. As one of innovative and high integration SoC chip, HMD100B is designed by digital and analog mixed circuit. It can support binocular stereo display, has better scaling effect and integration. Hence it is applicable in virtual reality (VR), 3D games and other microdisplay domains.","PeriodicalId":328281,"journal":{"name":"2009 International IEEE Consumer Electronics Society's Games Innovations Conference","volume":"89 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2009-10-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"VLSI design of 3D display processing chip for head-mounted display\",\"authors\":\"Chenyang Ge, Nanning Zheng, K. Mei, Jizhong Zhao\",\"doi\":\"10.1109/ICEGIC.2009.5293596\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In order to develop the core chip supporting binocular stereo displays for head-mounted display (HMD) and glasses-TV, a VLSI design scheme is proposed by using pipeline architecture for 3D display processing chip (HMD100B). Some key techniques including stereo display processing and high precision video scaling based on bicubic interpolation, and their hardware implementations are presented. A new method of field rate up-conversion for analog stereo video signal (CVBS) is proposed, and it can eliminate the large area of flicker. The proposed HMD100B chip is verified by FPGA, and the stereo display image is clear. As one of innovative and high integration SoC chip, HMD100B is designed by digital and analog mixed circuit. It can support binocular stereo display, has better scaling effect and integration. Hence it is applicable in virtual reality (VR), 3D games and other microdisplay domains.\",\"PeriodicalId\":328281,\"journal\":{\"name\":\"2009 International IEEE Consumer Electronics Society's Games Innovations Conference\",\"volume\":\"89 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2009-10-23\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2009 International IEEE Consumer Electronics Society's Games Innovations Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICEGIC.2009.5293596\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2009 International IEEE Consumer Electronics Society's Games Innovations Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICEGIC.2009.5293596","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
VLSI design of 3D display processing chip for head-mounted display
In order to develop the core chip supporting binocular stereo displays for head-mounted display (HMD) and glasses-TV, a VLSI design scheme is proposed by using pipeline architecture for 3D display processing chip (HMD100B). Some key techniques including stereo display processing and high precision video scaling based on bicubic interpolation, and their hardware implementations are presented. A new method of field rate up-conversion for analog stereo video signal (CVBS) is proposed, and it can eliminate the large area of flicker. The proposed HMD100B chip is verified by FPGA, and the stereo display image is clear. As one of innovative and high integration SoC chip, HMD100B is designed by digital and analog mixed circuit. It can support binocular stereo display, has better scaling effect and integration. Hence it is applicable in virtual reality (VR), 3D games and other microdisplay domains.