输出功率为23dbm的2.4 GHz 0.18 /spl μ m CMOS自偏置级联码功率放大器

2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.02CH37315) Pub Date : 2002-08-07 DOI:10.1109/ISSCC.2002.992229

T. Sowlati, D. Leenaerts

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引用次数: 42

摘要

一款两级自偏置级联码功率放大器，采用0.18 /spl mu/m CMOS工艺，适用于1类蓝牙应用，在2.4 GHz时输出功率为23dbm，增益为31db, PAE为42%。功率放大器芯片占用0.46 mm/sup 2/。

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A 2.4 GHz 0.18 /spl mu/m CMOS self-biased cascode power amplifier with 23 dBm output power

A two-stage self-biased cascode power amplifier in 0.18 /spl mu/m CMOS process for Class 1 Bluetooth application provides 23 dBm output power with 31 dB gain and 42% PAE at 2.4 GHz. The power amplifier die occupies 0.46 mm/sup 2/.

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2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.02CH37315)

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