{"title":"汉明神经网络的高速实现","authors":"Vladimir B. Kovacevic, A. Gavrovska, M. Paskas","doi":"10.1109/NEUREL.2010.5644080","DOIUrl":null,"url":null,"abstract":"Advancements in digital electronics and signal processing algorithms for various purposes generated the possibility and need for designing artificial neural networks in hardware. The selected platform, FPGA, enables fulfillment of their demands and provides comfortable work and test environment. This paper presents development cycle and specifics for implementation of high speed Hamming artificial neural network.","PeriodicalId":227890,"journal":{"name":"10th Symposium on Neural Network Applications in Electrical Engineering","volume":"220 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2010-11-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"High-speed implementation of Hamming neural network\",\"authors\":\"Vladimir B. Kovacevic, A. Gavrovska, M. Paskas\",\"doi\":\"10.1109/NEUREL.2010.5644080\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Advancements in digital electronics and signal processing algorithms for various purposes generated the possibility and need for designing artificial neural networks in hardware. The selected platform, FPGA, enables fulfillment of their demands and provides comfortable work and test environment. This paper presents development cycle and specifics for implementation of high speed Hamming artificial neural network.\",\"PeriodicalId\":227890,\"journal\":{\"name\":\"10th Symposium on Neural Network Applications in Electrical Engineering\",\"volume\":\"220 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2010-11-29\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"10th Symposium on Neural Network Applications in Electrical Engineering\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/NEUREL.2010.5644080\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"10th Symposium on Neural Network Applications in Electrical Engineering","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/NEUREL.2010.5644080","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
High-speed implementation of Hamming neural network
Advancements in digital electronics and signal processing algorithms for various purposes generated the possibility and need for designing artificial neural networks in hardware. The selected platform, FPGA, enables fulfillment of their demands and provides comfortable work and test environment. This paper presents development cycle and specifics for implementation of high speed Hamming artificial neural network.
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