市售碳化硅mosfet中交流栅极偏置应力降低漏极电流的评估

M. Sometani, Y. Iwahashi, M. Okamoto, S. Harada, Y. Yonezawa, H. Okumura, H. Yano
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引用次数: 2

摘要

在本研究中,我们构建了一个具有大电流额定值的新型测量装置来测量快速的Id变化,并使用市售的SiC mosfet评估了由于正交流栅极偏置导致的Id下降。此外,通过将获得的快速7d变化结果与常规直流栅极应力测试测量的阈值电压(Vth)移位进行比较,我们验证了常规直流应力测试不足以准确评估Vth移位。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Evaluation of drain current decrease by AC gate bias stress in commercially available SiC MOSFETs
In this study, we constructed a novel measurement setup with a large current rating to measure fast Id change, and evaluated the decrease in Id due to positive AC gate bias, using commercially available SiC MOSFETs. In addition, by comparing the obtained fast 7d change results with the threshold voltage (Vth) shift measured by a conventional DC gate stress test, we verified that the conventional DC stress test is not sufficient for accurate evaluation of the Vth shift.
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