{"title":"VLSI布局的算法方面","authors":"M. Sarrafzadeh, Der-Tsai Lee","doi":"10.1142/2105","DOIUrl":null,"url":null,"abstract":"Issues in timing driven layout, M. Marek-Sadowska binary formulations for placement and routing problems, M. Sriram, S.M. Kang a survey of parallel algorithms for placement, P. Banerjee near optimal fast solution to graph and hypergraph partitioning, F. Makedon, S. Tragoudas LP formulation of global routing and placement, T. Lengauer, M. Lugering circuit partitioning algorithms based on geometry model, T. Asano & Tokuyama on the Manhattan and knock-knee routing modes, D. Zhou, F.P. Preparata a note on the complexity of Stockmeyer's floorplan optimization technique, T.C. Wang, D.F. Wong the virtual height of a straight line embedding of a plane graph, T. Takahashi, Y. Kajitani routing around two rectangles to minimize the layout area, T. Gonzalez, S.L. Lee.","PeriodicalId":242664,"journal":{"name":"Lecture Notes Series on Computing","volume":"27 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1993-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"12","resultStr":"{\"title\":\"Algorithmic Aspects of VLSI Layout\",\"authors\":\"M. Sarrafzadeh, Der-Tsai Lee\",\"doi\":\"10.1142/2105\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Issues in timing driven layout, M. Marek-Sadowska binary formulations for placement and routing problems, M. Sriram, S.M. Kang a survey of parallel algorithms for placement, P. Banerjee near optimal fast solution to graph and hypergraph partitioning, F. Makedon, S. Tragoudas LP formulation of global routing and placement, T. Lengauer, M. Lugering circuit partitioning algorithms based on geometry model, T. Asano & Tokuyama on the Manhattan and knock-knee routing modes, D. Zhou, F.P. Preparata a note on the complexity of Stockmeyer's floorplan optimization technique, T.C. Wang, D.F. Wong the virtual height of a straight line embedding of a plane graph, T. Takahashi, Y. Kajitani routing around two rectangles to minimize the layout area, T. Gonzalez, S.L. Lee.\",\"PeriodicalId\":242664,\"journal\":{\"name\":\"Lecture Notes Series on Computing\",\"volume\":\"27 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1993-11-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"12\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Lecture Notes Series on Computing\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1142/2105\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Lecture Notes Series on Computing","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1142/2105","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 12
摘要
时间驱动布局中的问题，M. Marek-Sadowska放置和路由问题的二进制公式，M. Sriram, S.M. Kang放置并行算法的调查，P. Banerjee图和超图划分的近最优快速解决方案，F. Makedon, S. Tragoudas LP全局路由和放置公式，T. Lengauer, M. Lugering基于几何模型的电路划分算法，T. Asano和Tokuyama关于曼哈顿和膝盖路由模式，D. Zhou，F.P. Preparata关于Stockmeyer平面图优化技术复杂性的说明，T.C. Wang, D.F. Wong平面图中直线嵌入的虚拟高度，T. Takahashi, Y. Kajitani围绕两个矩形布线以最小化布局面积，T. Gonzalez, S.L. Lee。
Issues in timing driven layout, M. Marek-Sadowska binary formulations for placement and routing problems, M. Sriram, S.M. Kang a survey of parallel algorithms for placement, P. Banerjee near optimal fast solution to graph and hypergraph partitioning, F. Makedon, S. Tragoudas LP formulation of global routing and placement, T. Lengauer, M. Lugering circuit partitioning algorithms based on geometry model, T. Asano & Tokuyama on the Manhattan and knock-knee routing modes, D. Zhou, F.P. Preparata a note on the complexity of Stockmeyer's floorplan optimization technique, T.C. Wang, D.F. Wong the virtual height of a straight line embedding of a plane graph, T. Takahashi, Y. Kajitani routing around two rectangles to minimize the layout area, T. Gonzalez, S.L. Lee.
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