{"title":"基于0.5µm CMOS工艺的LDMOS-SCR等效电路模型验证","authors":"Zeyu Zhong, Xiangliang Jin","doi":"10.23919/IEDS48938.2021.9468862","DOIUrl":null,"url":null,"abstract":"Based on a LDMOS-SCR designed and manufactured in 0.5µm CMOS process, a SCR equivalent circuit model for ESD protection is applied and verified. Simulation results show a high consistency with the TLP 1-V curve. It contributes to the simulation methodology of SCR devices for ESD protection.","PeriodicalId":174954,"journal":{"name":"2020 International EOS/ESD Symposium on Design and System (IEDS)","volume":"13 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2021-06-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Verification of an Equivalent Circuit Model for LDMOS-SCR Based on 0.5 µm CMOS Process\",\"authors\":\"Zeyu Zhong, Xiangliang Jin\",\"doi\":\"10.23919/IEDS48938.2021.9468862\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Based on a LDMOS-SCR designed and manufactured in 0.5µm CMOS process, a SCR equivalent circuit model for ESD protection is applied and verified. Simulation results show a high consistency with the TLP 1-V curve. It contributes to the simulation methodology of SCR devices for ESD protection.\",\"PeriodicalId\":174954,\"journal\":{\"name\":\"2020 International EOS/ESD Symposium on Design and System (IEDS)\",\"volume\":\"13 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2021-06-23\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2020 International EOS/ESD Symposium on Design and System (IEDS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.23919/IEDS48938.2021.9468862\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 International EOS/ESD Symposium on Design and System (IEDS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.23919/IEDS48938.2021.9468862","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Verification of an Equivalent Circuit Model for LDMOS-SCR Based on 0.5 µm CMOS Process
Based on a LDMOS-SCR designed and manufactured in 0.5µm CMOS process, a SCR equivalent circuit model for ESD protection is applied and verified. Simulation results show a high consistency with the TLP 1-V curve. It contributes to the simulation methodology of SCR devices for ESD protection.
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