Vassilis Alimisis, Marios Gourdouparis, Christos Dimas, P. Sotiriadis
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引用次数: 2
摘要
本研究提出了一种超低功耗(6.0nW)、低电压(0.6V)、体控、10晶体管碰撞电路架构,用于实现高斯函数。它可以作为高斯混合模型和核方法模拟实现的构建块。高斯曲线的宽度,高度和中心是独立的和电子可调的。它由一个改进的电流相关器和一个块控差分块组成,所有晶体管都工作在亚阈值下。通过仿真和理论分析,验证了该方法的正确性、准确性和鲁棒性。采用台积电90nm CMOS工艺实现,并采用Cadence IC Suite进行仿真。
This work proposes an ultra-low power (6.0nW), low voltage (0.6V), bulk-controlled, 10-transistors bump circuit architecture for Gaussian-function implementation. It can be used as a building block for analog implementation of Gaussian Mixture Model and Kernel Methods. The Gaussians curve width, height and center are independently and electronically adjustable. It consists of a modified current correlator and a bulk-controlled differential block with all transistors operating in sub-threshold. Proper operation, accuracy and robustness are confirmed via simulation and theoretical analysis. It was implemented in TSMC 90nm CMOS process and was simulated using the Cadence IC Suite.