设计、分析和FPGA实现LDPC代码与BCH代码

2013 International Conference on Current Trends in Engineering and Technology (ICCTET) Pub Date : 2013-07-03 DOI:10.1109/ICCTET.2013.6675957

R. Muthammal, S. S. R. Madhane

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引用次数: 5

摘要

在这项工作中，对LDPC和BCH码进行了分析，BCH码[1]和LDPC码都是可用于无线标准的纠错码，通过在FPGA中实现这两种纠错码，我们分析了纠错码的架构，以表明LDPC比BCH码具有低面积和低功耗。

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Design, analysis and FPGA implementation LDPC codes with BCH codes

In this work, a analysis is performed between LDPC and BCH codes, the BCH codes[1] and LDPC codes both being an error correcting codes that can be used in wireless standards, by implementing these two error correcting codes in FPGA we analyze the Architectures of Error correcting codes in order to show that LDPC is having low area and less power than BCH codes.

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2013 International Conference on Current Trends in Engineering and Technology (ICCTET)

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