{"title":"金属-多晶硅掺杂硅对接触头失效机理","authors":"A. Mohsen, T. F. Retajczyk, S. Haszko","doi":"10.1109/IRPS.1975.362687","DOIUrl":null,"url":null,"abstract":"The metal-polysilicon-doped silicon butting contact is presently widely used in MOS silicon gate integrated circuits because it occupies minimum area on the chip and does not require additional photolithography. A possible failure mechanism of this contact with self-aligned, ion-implanted sources and drains has been observed. Recent data obtained on processes used to fabricate two-phase, two-level polysilicon CCDs are presented. Results show that oxide etching under the edges of the polysilicon gate during contact window definition can lead to excessive leakage due to metal-to-substrate shorts at the metal-polysilicon-doped silicon butting contact.","PeriodicalId":369161,"journal":{"name":"13th International Reliability Physics Symposium","volume":"56 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1975-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Failure Mechanism of Metal-Polysilicon-Doped Silicon Butting Contacts\",\"authors\":\"A. Mohsen, T. F. Retajczyk, S. Haszko\",\"doi\":\"10.1109/IRPS.1975.362687\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The metal-polysilicon-doped silicon butting contact is presently widely used in MOS silicon gate integrated circuits because it occupies minimum area on the chip and does not require additional photolithography. A possible failure mechanism of this contact with self-aligned, ion-implanted sources and drains has been observed. Recent data obtained on processes used to fabricate two-phase, two-level polysilicon CCDs are presented. Results show that oxide etching under the edges of the polysilicon gate during contact window definition can lead to excessive leakage due to metal-to-substrate shorts at the metal-polysilicon-doped silicon butting contact.\",\"PeriodicalId\":369161,\"journal\":{\"name\":\"13th International Reliability Physics Symposium\",\"volume\":\"56 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1975-04-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"13th International Reliability Physics Symposium\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IRPS.1975.362687\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"13th International Reliability Physics Symposium","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IRPS.1975.362687","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Failure Mechanism of Metal-Polysilicon-Doped Silicon Butting Contacts
The metal-polysilicon-doped silicon butting contact is presently widely used in MOS silicon gate integrated circuits because it occupies minimum area on the chip and does not require additional photolithography. A possible failure mechanism of this contact with self-aligned, ion-implanted sources and drains has been observed. Recent data obtained on processes used to fabricate two-phase, two-level polysilicon CCDs are presented. Results show that oxide etching under the edges of the polysilicon gate during contact window definition can lead to excessive leakage due to metal-to-substrate shorts at the metal-polysilicon-doped silicon butting contact.