HEVC帧内编码率失真优化的硬件友好方法

2017 IEEE Pacific Rim Conference on Communications, Computers and Signal Processing (PACRIM) Pub Date : 2017-08-01 DOI:10.1109/PACRIM.2017.8121907

Yanling Xu, X. Guo, Dayao Wei

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引用次数: 0

摘要

高效视频编码(High Efficiency Video Coding, HEVC)采用复杂率失真优化(complex rate-distortion optimization, RDO)来选择最优模式决策，导致计算复杂度急剧增加。为了解决这一问题，本文提出了一种新的HEVC模式内决策RD估计方法，该方法利用变换系数进行率失真优化。对于速率部分，该方法利用DCT系数的柯西分布概率密度来估计比特数。对于失真部分，利用DCT和IDCT系数的差值进行失真估计。与原有的HEVC算法相比，该算法可减少约38%的时间消耗，bd率仅为0.72%。

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Hardware-friendly method for rate-distortion optimization of HEVC intra coding

High Efficiency Video Coding (HEVC) employs the complex rate-distortion optimization (RDO) to choose the optimal mode decison which leads to the drastical increase of computation complexity. In order to solve the problem, this paper proposed a new RD estimation method for HEVC intra mode decision that uses transformed coefficients to do the rate-distortion optimization. For the rate part, the method uses the Cauchy distribution probability density of DCT coefficients to estimate the number of bits. For the distortion part, the differences between the DCT and IDCT coefficients are used for the distortion estimation. Compared with original HEVC algorithm, the proposed algorithm could reduce about 38% time consumption as well as the BD-rate is only 0.72%.

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2017 IEEE Pacific Rim Conference on Communications, Computers and Signal Processing (PACRIM)

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