高性能肖特基源/漏极mosfet的解决方案:肖特基势垒高度工程与掺杂分离技术

A. Kinoshita, Y. Tsuchiya, A. Yagishita, K. Uchida, J. Koga
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引用次数: 129

摘要

提出了一种实现高性能肖特基源极/漏极mosfet(肖特基势垒晶体管)的新方法。采用掺杂偏析(DS)技术,证明了肖特基势垒高度的显著调制。与传统MOSFET相比,采用CoSi/sub /工艺制备的DS-SBT具有较强的驱动电流和较好的抗短通道效应。总之,ds -肖特基结对于高级mosfet的源极/漏极是有用的。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Solution for high-performance Schottky-source/drain MOSFETs: Schottky barrier height engineering with dopant segregation technique
A novel approach for achieving high-performance Schottky-source/drain MOSFETs (SBTs: Schottky Barrier Transistors) is proposed. The dopant segregation (DS) technique is employed and significant modulation of Schottky barrier height is demonstrated. The DS-SBT fabricated with the current CoSi/sub 2/ process show competitive drive current and better short-channel-effect immunity compared to the conventional MOSFET. In conclusion the DS-Schottky junction is useful for the source/drain of advanced MOSFETs.
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