M. Christensen, P. Milojkovic, C. Kuzniac, M. Haney
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Design of a 160 Gbps free-space optical interconnection fabric for fully connected multi-chip applications
In the FAST-Net approach the optical I/O from any single smart pixel array (SPA) chip, located at a lens' focal plane, are linked to portions of the I/O arrays of all chips in the system. To achieve this, clusters of VCSELs and photodetectors are imaged onto corresponding clusters on other chips. Multiple point-to-point links are established between cluster pairs on different SPAs. The clusters are interleaved to achieve a global interconnection pattern across the multi-chip plane, thus effecting a high-density bidirectional data path between every pair of SPA chips on the MCM. SPA chips with integrated VCSEL/detector arrays.